1/* 2 * Copyright (c) 2013, Al Stone <al.stone@linaro.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 22 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 23 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 26 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * 29 * NB: This License is also known as the "BSD 2-Clause License". 30 * 31 * 32 * [FACP] ACPI Table 33 * 34 */ 35 36[0004] Signature : "FACP" 37[0004] Table Length : 0000010C 38[0001] Revision : 05 39[0001] Checksum : 18 40[0006] Oem ID : "LINARO" 41[0008] Oem Table ID : "RTSMVEV8" 42[0004] Oem Revision : 00000000 43[0004] Asl Compiler ID : "INTL" 44[0004] Asl Compiler Revision : 20111123 45 46[0004] FACS Address : 00000000 47[0004] DSDT Address : 00000010 48[0001] Model : 00 49[0001] PM Profile : 04 /* Enterprise Server */ 50[0002] SCI Interrupt : 0000 51[0004] SMI Command Port : 00000000 52[0001] ACPI Enable Value : 00 53[0001] ACPI Disable Value : 00 54[0001] S4BIOS Command : 00 55[0001] P-State Control : 00 56[0004] PM1A Event Block Address : 00000001 57[0004] PM1B Event Block Address : 00000000 58[0004] PM1A Control Block Address : 00000001 59[0004] PM1B Control Block Address : 00000000 60[0004] PM2 Control Block Address : 00000001 61[0004] PM Timer Block Address : 00000001 62[0004] GPE0 Block Address : 00000001 63[0004] GPE1 Block Address : 00000000 64[0001] PM1 Event Block Length : 04 65[0001] PM1 Control Block Length : 02 66[0001] PM2 Control Block Length : 01 67[0001] PM Timer Block Length : 04 68[0001] GPE0 Block Length : 08 69[0001] GPE1 Block Length : 00 70[0001] GPE1 Base Offset : 00 71[0001] _CST Support : 00 72[0002] C2 Latency : 0000 73[0002] C3 Latency : 0000 74[0002] CPU Cache Size : 0000 75[0002] Cache Flush Stride : 0000 76[0001] Duty Cycle Offset : 00 77[0001] Duty Cycle Width : 00 78[0001] RTC Day Alarm Index : 00 79[0001] RTC Month Alarm Index : 00 80[0001] RTC Century Index : 00 81[0002] Boot Flags (decoded below) : 0000 82 Legacy Devices Supported (V2) : 0 83 8042 Present on ports 60/64 (V2) : 0 84 VGA Not Present (V4) : 0 85 MSI Not Supported (V4) : 0 86 PCIe ASPM Not Supported (V4) : 0 87 CMOS RTC Not Present (V5) : 0 88[0001] Reserved : 00 89[0004] Flags (decoded below) : 00000000 90 WBINVD instruction is operational (V1) : 1 91 WBINVD flushes all caches (V1) : 1 92 All CPUs support C1 (V1) : 0 93 C2 works on MP system (V1) : 0 94 Control Method Power Button (V1) : 1 95 Control Method Sleep Button (V1) : 1 96 RTC wake not in fixed reg space (V1) : 0 97 RTC can wake system from S4 (V1) : 0 98 32-bit PM Timer (V1) : 0 99 Docking Supported (V1) : 0 100 Reset Register Supported (V2) : 0 101 Sealed Case (V3) : 0 102 Headless - No Video (V3) : 1 103 Use native instr after SLP_TYPx (V3) : 0 104 PCIEXP_WAK Bits Supported (V4) : 0 105 Use Platform Timer (V4) : 0 106 RTC_STS valid on S4 wake (V4) : 0 107 Remote Power-on capable (V4) : 1 108 Use APIC Cluster Model (V4) : 0 109 Use APIC Physical Destination Mode (V4) : 0 110 Hardware Reduced (V5) : 1 111 Low Power S0 Idle (V5) : 1 112 113[0012] Reset Register : [Generic Address Structure] 114[0001] Space ID : 01 [SystemIO] 115[0001] Bit Width : 08 116[0001] Bit Offset : 00 117[0001] Encoded Access Width : 01 [Byte Access:8] 118[0008] Address : 0000000000000001 119 120[0001] Value to cause reset : 00 121[0002] ARM_BOOT_ARCH (decoded below) : 0001 122 Use PSCI 0.2+ : 1 123 PSCI Use HVC : 0 124[0001] FADT Minor Revision : 01 125[0008] FACS Address : 0000000000000000 126[0008] DSDT Address : 0000000000000010 127[0012] PM1A Event Block : [Generic Address Structure] 128[0001] Space ID : 01 [SystemIO] 129[0001] Bit Width : 20 130[0001] Bit Offset : 00 131[0001] Encoded Access Width : 02 [Word Access:16] 132[0008] Address : 0000000000000001 133 134[0012] PM1B Event Block : [Generic Address Structure] 135[0001] Space ID : 01 [SystemIO] 136[0001] Bit Width : 00 137[0001] Bit Offset : 00 138[0001] Encoded Access Width : 00 [Undefined/Legacy] 139[0008] Address : 0000000000000000 140 141[0012] PM1A Control Block : [Generic Address Structure] 142[0001] Space ID : 01 [SystemIO] 143[0001] Bit Width : 10 144[0001] Bit Offset : 00 145[0001] Encoded Access Width : 02 [Word Access:16] 146[0008] Address : 0000000000000001 147 148[0012] PM1B Control Block : [Generic Address Structure] 149[0001] Space ID : 01 [SystemIO] 150[0001] Bit Width : 00 151[0001] Bit Offset : 00 152[0001] Encoded Access Width : 00 [Undefined/Legacy] 153[0008] Address : 0000000000000000 154 155[0012] PM2 Control Block : [Generic Address Structure] 156[0001] Space ID : 01 [SystemIO] 157[0001] Bit Width : 08 158[0001] Bit Offset : 00 159[0001] Encoded Access Width : 00 [Undefined/Legacy] 160[0008] Address : 0000000000000001 161 162[0012] PM Timer Block : [Generic Address Structure] 163[0001] Space ID : 01 [SystemIO] 164[0001] Bit Width : 20 165[0001] Bit Offset : 00 166[0001] Encoded Access Width : 03 [DWord Access:32] 167[0008] Address : 0000000000000001 168 169[0012] GPE0 Block : [Generic Address Structure] 170[0001] Space ID : 01 [SystemIO] 171[0001] Bit Width : 80 172[0001] Bit Offset : 00 173[0001] Encoded Access Width : 01 [Byte Access:8] 174[0008] Address : 0000000000000001 175 176[0012] GPE1 Block : [Generic Address Structure] 177[0001] Space ID : 01 [SystemIO] 178[0001] Bit Width : 00 179[0001] Bit Offset : 00 180[0001] Encoded Access Width : 00 [Undefined/Legacy] 181[0008] Address : 0000000000000000 182 183 184[0012] Sleep Control Register : [Generic Address Structure] 185[0001] Space ID : 01 [SystemIO] 186[0001] Bit Width : 08 187[0001] Bit Offset : 00 188[0001] Encoded Access Width : 01 [Byte Access:8] 189[0008] Address : 0000000000000000 190 191[0012] Sleep Status Register : [Generic Address Structure] 192[0001] Space ID : 01 [SystemIO] 193[0001] Bit Width : 08 194[0001] Bit Offset : 00 195[0001] Encoded Access Width : 01 [Byte Access:8] 196[0008] Address : 0000000000000000 197 198