1#!/usr/bin/env perl 2# 3# ==================================================================== 4# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL 5# project. The module is, however, dual licensed under OpenSSL and 6# CRYPTOGAMS licenses depending on where you obtain it. For further 7# details see http://www.openssl.org/~appro/cryptogams/. 8# ==================================================================== 9# 10# March, June 2010 11# 12# The module implements "4-bit" GCM GHASH function and underlying 13# single multiplication operation in GF(2^128). "4-bit" means that 14# it uses 256 bytes per-key table [+128 bytes shared table]. GHASH 15# function features so called "528B" variant utilizing additional 16# 256+16 bytes of per-key storage [+512 bytes shared table]. 17# Performance results are for this streamed GHASH subroutine and are 18# expressed in cycles per processed byte, less is better: 19# 20# gcc 3.4.x(*) assembler 21# 22# P4 28.6 14.0 +100% 23# Opteron 19.3 7.7 +150% 24# Core2 17.8 8.1(**) +120% 25# Atom 31.6 16.8 +88% 26# VIA Nano 21.8 10.1 +115% 27# 28# (*) comparison is not completely fair, because C results are 29# for vanilla "256B" implementation, while assembler results 30# are for "528B";-) 31# (**) it's mystery [to me] why Core2 result is not same as for 32# Opteron; 33 34# May 2010 35# 36# Add PCLMULQDQ version performing at 2.02 cycles per processed byte. 37# See ghash-x86.pl for background information and details about coding 38# techniques. 39# 40# Special thanks to David Woodhouse <dwmw2@infradead.org> for 41# providing access to a Westmere-based system on behalf of Intel 42# Open Source Technology Centre. 43 44# December 2012 45# 46# Overhaul: aggregate Karatsuba post-processing, improve ILP in 47# reduction_alg9, increase reduction aggregate factor to 4x. As for 48# the latter. ghash-x86.pl discusses that it makes lesser sense to 49# increase aggregate factor. Then why increase here? Critical path 50# consists of 3 independent pclmulqdq instructions, Karatsuba post- 51# processing and reduction. "On top" of this we lay down aggregated 52# multiplication operations, triplets of independent pclmulqdq's. As 53# issue rate for pclmulqdq is limited, it makes lesser sense to 54# aggregate more multiplications than it takes to perform remaining 55# non-multiplication operations. 2x is near-optimal coefficient for 56# contemporary Intel CPUs (therefore modest improvement coefficient), 57# but not for Bulldozer. Latter is because logical SIMD operations 58# are twice as slow in comparison to Intel, so that critical path is 59# longer. A CPU with higher pclmulqdq issue rate would also benefit 60# from higher aggregate factor... 61# 62# Westmere 1.78(+13%) 63# Sandy Bridge 1.80(+8%) 64# Ivy Bridge 1.80(+7%) 65# Haswell 0.55(+93%) (if system doesn't support AVX) 66# Broadwell 0.45(+110%)(if system doesn't support AVX) 67# Skylake 0.44(+110%)(if system doesn't support AVX) 68# Bulldozer 1.49(+27%) 69# Silvermont 2.88(+13%) 70# Goldmont 1.08(+24%) 71 72# March 2013 73# 74# ... 8x aggregate factor AVX code path is using reduction algorithm 75# suggested by Shay Gueron[1]. Even though contemporary AVX-capable 76# CPUs such as Sandy and Ivy Bridge can execute it, the code performs 77# sub-optimally in comparison to above mentioned version. But thanks 78# to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that 79# it performs in 0.41 cycles per byte on Haswell processor, in 80# 0.29 on Broadwell, and in 0.36 on Skylake. 81# 82# [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest 83 84$flavour = shift; 85$output = shift; 86if ($flavour =~ /\./) { $output = $flavour; undef $flavour; } 87 88$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/); 89 90$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 91( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or 92( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or 93die "can't locate x86_64-xlate.pl"; 94 95# See the notes about |$avx| in aesni-gcm-x86_64.pl; otherwise tags will be 96# computed incorrectly. 97# 98# In upstream, this is controlled by shelling out to the compiler to check 99# versions, but BoringSSL is intended to be used with pre-generated perlasm 100# output, so this isn't useful anyway. 101$avx = 1; 102 103open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""; 104*STDOUT=*OUT; 105 106$do4xaggr=1; 107 108# common register layout 109$nlo="%rax"; 110$nhi="%rbx"; 111$Zlo="%r8"; 112$Zhi="%r9"; 113$tmp="%r10"; 114$rem_4bit = "%r11"; 115 116$Xi="%rdi"; 117$Htbl="%rsi"; 118 119# per-function register layout 120$cnt="%rcx"; 121$rem="%rdx"; 122 123sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/ or 124 $r =~ s/%[er]([sd]i)/%\1l/ or 125 $r =~ s/%[er](bp)/%\1l/ or 126 $r =~ s/%(r[0-9]+)[d]?/%\1b/; $r; } 127 128sub AUTOLOAD() # thunk [simplified] 32-bit style perlasm 129{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; 130 my $arg = pop; 131 $arg = "\$$arg" if ($arg*1 eq $arg); 132 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n"; 133} 134 135{ my $N; 136 sub loop() { 137 my $inp = shift; 138 139 $N++; 140$code.=<<___; 141 xor $nlo,$nlo 142 xor $nhi,$nhi 143 mov `&LB("$Zlo")`,`&LB("$nlo")` 144 mov `&LB("$Zlo")`,`&LB("$nhi")` 145 shl \$4,`&LB("$nlo")` 146 mov \$14,$cnt 147 mov 8($Htbl,$nlo),$Zlo 148 mov ($Htbl,$nlo),$Zhi 149 and \$0xf0,`&LB("$nhi")` 150 mov $Zlo,$rem 151 jmp .Loop$N 152 153.align 16 154.Loop$N: 155 shr \$4,$Zlo 156 and \$0xf,$rem 157 mov $Zhi,$tmp 158 mov ($inp,$cnt),`&LB("$nlo")` 159 shr \$4,$Zhi 160 xor 8($Htbl,$nhi),$Zlo 161 shl \$60,$tmp 162 xor ($Htbl,$nhi),$Zhi 163 mov `&LB("$nlo")`,`&LB("$nhi")` 164 xor ($rem_4bit,$rem,8),$Zhi 165 mov $Zlo,$rem 166 shl \$4,`&LB("$nlo")` 167 xor $tmp,$Zlo 168 dec $cnt 169 js .Lbreak$N 170 171 shr \$4,$Zlo 172 and \$0xf,$rem 173 mov $Zhi,$tmp 174 shr \$4,$Zhi 175 xor 8($Htbl,$nlo),$Zlo 176 shl \$60,$tmp 177 xor ($Htbl,$nlo),$Zhi 178 and \$0xf0,`&LB("$nhi")` 179 xor ($rem_4bit,$rem,8),$Zhi 180 mov $Zlo,$rem 181 xor $tmp,$Zlo 182 jmp .Loop$N 183 184.align 16 185.Lbreak$N: 186 shr \$4,$Zlo 187 and \$0xf,$rem 188 mov $Zhi,$tmp 189 shr \$4,$Zhi 190 xor 8($Htbl,$nlo),$Zlo 191 shl \$60,$tmp 192 xor ($Htbl,$nlo),$Zhi 193 and \$0xf0,`&LB("$nhi")` 194 xor ($rem_4bit,$rem,8),$Zhi 195 mov $Zlo,$rem 196 xor $tmp,$Zlo 197 198 shr \$4,$Zlo 199 and \$0xf,$rem 200 mov $Zhi,$tmp 201 shr \$4,$Zhi 202 xor 8($Htbl,$nhi),$Zlo 203 shl \$60,$tmp 204 xor ($Htbl,$nhi),$Zhi 205 xor $tmp,$Zlo 206 xor ($rem_4bit,$rem,8),$Zhi 207 208 bswap $Zlo 209 bswap $Zhi 210___ 211}} 212 213$code=<<___; 214.text 215.extern OPENSSL_ia32cap_P 216 217.globl gcm_gmult_4bit 218.type gcm_gmult_4bit,\@function,2 219.align 16 220gcm_gmult_4bit: 221 push %rbx 222 push %rbp # %rbp and others are pushed exclusively in 223 push %r12 # order to reuse Win64 exception handler... 224 push %r13 225 push %r14 226 push %r15 227 sub \$280,%rsp 228.Lgmult_prologue: 229 230 movzb 15($Xi),$Zlo 231 lea .Lrem_4bit(%rip),$rem_4bit 232___ 233 &loop ($Xi); 234$code.=<<___; 235 mov $Zlo,8($Xi) 236 mov $Zhi,($Xi) 237 238 lea 280+48(%rsp),%rsi 239 mov -8(%rsi),%rbx 240 lea (%rsi),%rsp 241.Lgmult_epilogue: 242 ret 243.size gcm_gmult_4bit,.-gcm_gmult_4bit 244___ 245 246# per-function register layout 247$inp="%rdx"; 248$len="%rcx"; 249$rem_8bit=$rem_4bit; 250 251$code.=<<___; 252.globl gcm_ghash_4bit 253.type gcm_ghash_4bit,\@function,4 254.align 16 255gcm_ghash_4bit: 256 push %rbx 257 push %rbp 258 push %r12 259 push %r13 260 push %r14 261 push %r15 262 sub \$280,%rsp 263.Lghash_prologue: 264 mov $inp,%r14 # reassign couple of args 265 mov $len,%r15 266___ 267{ my $inp="%r14"; 268 my $dat="%edx"; 269 my $len="%r15"; 270 my @nhi=("%ebx","%ecx"); 271 my @rem=("%r12","%r13"); 272 my $Hshr4="%rbp"; 273 274 &sub ($Htbl,-128); # size optimization 275 &lea ($Hshr4,"16+128(%rsp)"); 276 { my @lo =($nlo,$nhi); 277 my @hi =($Zlo,$Zhi); 278 279 &xor ($dat,$dat); 280 for ($i=0,$j=-2;$i<18;$i++,$j++) { 281 &mov ("$j(%rsp)",&LB($dat)) if ($i>1); 282 &or ($lo[0],$tmp) if ($i>1); 283 &mov (&LB($dat),&LB($lo[1])) if ($i>0 && $i<17); 284 &shr ($lo[1],4) if ($i>0 && $i<17); 285 &mov ($tmp,$hi[1]) if ($i>0 && $i<17); 286 &shr ($hi[1],4) if ($i>0 && $i<17); 287 &mov ("8*$j($Hshr4)",$hi[0]) if ($i>1); 288 &mov ($hi[0],"16*$i+0-128($Htbl)") if ($i<16); 289 &shl (&LB($dat),4) if ($i>0 && $i<17); 290 &mov ("8*$j-128($Hshr4)",$lo[0]) if ($i>1); 291 &mov ($lo[0],"16*$i+8-128($Htbl)") if ($i<16); 292 &shl ($tmp,60) if ($i>0 && $i<17); 293 294 push (@lo,shift(@lo)); 295 push (@hi,shift(@hi)); 296 } 297 } 298 &add ($Htbl,-128); 299 &mov ($Zlo,"8($Xi)"); 300 &mov ($Zhi,"0($Xi)"); 301 &add ($len,$inp); # pointer to the end of data 302 &lea ($rem_8bit,".Lrem_8bit(%rip)"); 303 &jmp (".Louter_loop"); 304 305$code.=".align 16\n.Louter_loop:\n"; 306 &xor ($Zhi,"($inp)"); 307 &mov ("%rdx","8($inp)"); 308 &lea ($inp,"16($inp)"); 309 &xor ("%rdx",$Zlo); 310 &mov ("($Xi)",$Zhi); 311 &mov ("8($Xi)","%rdx"); 312 &shr ("%rdx",32); 313 314 &xor ($nlo,$nlo); 315 &rol ($dat,8); 316 &mov (&LB($nlo),&LB($dat)); 317 &movz ($nhi[0],&LB($dat)); 318 &shl (&LB($nlo),4); 319 &shr ($nhi[0],4); 320 321 for ($j=11,$i=0;$i<15;$i++) { 322 &rol ($dat,8); 323 &xor ($Zlo,"8($Htbl,$nlo)") if ($i>0); 324 &xor ($Zhi,"($Htbl,$nlo)") if ($i>0); 325 &mov ($Zlo,"8($Htbl,$nlo)") if ($i==0); 326 &mov ($Zhi,"($Htbl,$nlo)") if ($i==0); 327 328 &mov (&LB($nlo),&LB($dat)); 329 &xor ($Zlo,$tmp) if ($i>0); 330 &movzw ($rem[1],"($rem_8bit,$rem[1],2)") if ($i>0); 331 332 &movz ($nhi[1],&LB($dat)); 333 &shl (&LB($nlo),4); 334 &movzb ($rem[0],"(%rsp,$nhi[0])"); 335 336 &shr ($nhi[1],4) if ($i<14); 337 &and ($nhi[1],0xf0) if ($i==14); 338 &shl ($rem[1],48) if ($i>0); 339 &xor ($rem[0],$Zlo); 340 341 &mov ($tmp,$Zhi); 342 &xor ($Zhi,$rem[1]) if ($i>0); 343 &shr ($Zlo,8); 344 345 &movz ($rem[0],&LB($rem[0])); 346 &mov ($dat,"$j($Xi)") if (--$j%4==0); 347 &shr ($Zhi,8); 348 349 &xor ($Zlo,"-128($Hshr4,$nhi[0],8)"); 350 &shl ($tmp,56); 351 &xor ($Zhi,"($Hshr4,$nhi[0],8)"); 352 353 unshift (@nhi,pop(@nhi)); # "rotate" registers 354 unshift (@rem,pop(@rem)); 355 } 356 &movzw ($rem[1],"($rem_8bit,$rem[1],2)"); 357 &xor ($Zlo,"8($Htbl,$nlo)"); 358 &xor ($Zhi,"($Htbl,$nlo)"); 359 360 &shl ($rem[1],48); 361 &xor ($Zlo,$tmp); 362 363 &xor ($Zhi,$rem[1]); 364 &movz ($rem[0],&LB($Zlo)); 365 &shr ($Zlo,4); 366 367 &mov ($tmp,$Zhi); 368 &shl (&LB($rem[0]),4); 369 &shr ($Zhi,4); 370 371 &xor ($Zlo,"8($Htbl,$nhi[0])"); 372 &movzw ($rem[0],"($rem_8bit,$rem[0],2)"); 373 &shl ($tmp,60); 374 375 &xor ($Zhi,"($Htbl,$nhi[0])"); 376 &xor ($Zlo,$tmp); 377 &shl ($rem[0],48); 378 379 &bswap ($Zlo); 380 &xor ($Zhi,$rem[0]); 381 382 &bswap ($Zhi); 383 &cmp ($inp,$len); 384 &jb (".Louter_loop"); 385} 386$code.=<<___; 387 mov $Zlo,8($Xi) 388 mov $Zhi,($Xi) 389 390 lea 280+48(%rsp),%rsi 391 mov -48(%rsi),%r15 392 mov -40(%rsi),%r14 393 mov -32(%rsi),%r13 394 mov -24(%rsi),%r12 395 mov -16(%rsi),%rbp 396 mov -8(%rsi),%rbx 397 lea 0(%rsi),%rsp 398.Lghash_epilogue: 399 ret 400.size gcm_ghash_4bit,.-gcm_ghash_4bit 401___ 402 403###################################################################### 404# PCLMULQDQ version. 405 406@_4args=$win64? ("%rcx","%rdx","%r8", "%r9") : # Win64 order 407 ("%rdi","%rsi","%rdx","%rcx"); # Unix order 408 409($Xi,$Xhi)=("%xmm0","%xmm1"); $Hkey="%xmm2"; 410($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5"); 411 412sub clmul64x64_T2 { # minimal register pressure 413my ($Xhi,$Xi,$Hkey,$HK)=@_; 414 415if (!defined($HK)) { $HK = $T2; 416$code.=<<___; 417 movdqa $Xi,$Xhi # 418 pshufd \$0b01001110,$Xi,$T1 419 pshufd \$0b01001110,$Hkey,$T2 420 pxor $Xi,$T1 # 421 pxor $Hkey,$T2 422___ 423} else { 424$code.=<<___; 425 movdqa $Xi,$Xhi # 426 pshufd \$0b01001110,$Xi,$T1 427 pxor $Xi,$T1 # 428___ 429} 430$code.=<<___; 431 pclmulqdq \$0x00,$Hkey,$Xi ####### 432 pclmulqdq \$0x11,$Hkey,$Xhi ####### 433 pclmulqdq \$0x00,$HK,$T1 ####### 434 pxor $Xi,$T1 # 435 pxor $Xhi,$T1 # 436 437 movdqa $T1,$T2 # 438 psrldq \$8,$T1 439 pslldq \$8,$T2 # 440 pxor $T1,$Xhi 441 pxor $T2,$Xi # 442___ 443} 444 445sub reduction_alg9 { # 17/11 times faster than Intel version 446my ($Xhi,$Xi) = @_; 447 448$code.=<<___; 449 # 1st phase 450 movdqa $Xi,$T2 # 451 movdqa $Xi,$T1 452 psllq \$5,$Xi 453 pxor $Xi,$T1 # 454 psllq \$1,$Xi 455 pxor $T1,$Xi # 456 psllq \$57,$Xi # 457 movdqa $Xi,$T1 # 458 pslldq \$8,$Xi 459 psrldq \$8,$T1 # 460 pxor $T2,$Xi 461 pxor $T1,$Xhi # 462 463 # 2nd phase 464 movdqa $Xi,$T2 465 psrlq \$1,$Xi 466 pxor $T2,$Xhi # 467 pxor $Xi,$T2 468 psrlq \$5,$Xi 469 pxor $T2,$Xi # 470 psrlq \$1,$Xi # 471 pxor $Xhi,$Xi # 472___ 473} 474 475{ my ($Htbl,$Xip)=@_4args; 476 my $HK="%xmm6"; 477 478$code.=<<___; 479.globl gcm_init_clmul 480.type gcm_init_clmul,\@abi-omnipotent 481.align 16 482gcm_init_clmul: 483.L_init_clmul: 484___ 485$code.=<<___ if ($win64); 486.LSEH_begin_gcm_init_clmul: 487 # I can't trust assembler to use specific encoding:-( 488 .byte 0x48,0x83,0xec,0x18 #sub $0x18,%rsp 489 .byte 0x0f,0x29,0x34,0x24 #movaps %xmm6,(%rsp) 490___ 491$code.=<<___; 492 movdqu ($Xip),$Hkey 493 pshufd \$0b01001110,$Hkey,$Hkey # dword swap 494 495 # <<1 twist 496 pshufd \$0b11111111,$Hkey,$T2 # broadcast uppermost dword 497 movdqa $Hkey,$T1 498 psllq \$1,$Hkey 499 pxor $T3,$T3 # 500 psrlq \$63,$T1 501 pcmpgtd $T2,$T3 # broadcast carry bit 502 pslldq \$8,$T1 503 por $T1,$Hkey # H<<=1 504 505 # magic reduction 506 pand .L0x1c2_polynomial(%rip),$T3 507 pxor $T3,$Hkey # if(carry) H^=0x1c2_polynomial 508 509 # calculate H^2 510 pshufd \$0b01001110,$Hkey,$HK 511 movdqa $Hkey,$Xi 512 pxor $Hkey,$HK 513___ 514 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); 515 &reduction_alg9 ($Xhi,$Xi); 516$code.=<<___; 517 pshufd \$0b01001110,$Hkey,$T1 518 pshufd \$0b01001110,$Xi,$T2 519 pxor $Hkey,$T1 # Karatsuba pre-processing 520 movdqu $Hkey,0x00($Htbl) # save H 521 pxor $Xi,$T2 # Karatsuba pre-processing 522 movdqu $Xi,0x10($Htbl) # save H^2 523 palignr \$8,$T1,$T2 # low part is H.lo^H.hi... 524 movdqu $T2,0x20($Htbl) # save Karatsuba "salt" 525___ 526if ($do4xaggr) { 527 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H^3 528 &reduction_alg9 ($Xhi,$Xi); 529$code.=<<___; 530 movdqa $Xi,$T3 531___ 532 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H^4 533 &reduction_alg9 ($Xhi,$Xi); 534$code.=<<___; 535 pshufd \$0b01001110,$T3,$T1 536 pshufd \$0b01001110,$Xi,$T2 537 pxor $T3,$T1 # Karatsuba pre-processing 538 movdqu $T3,0x30($Htbl) # save H^3 539 pxor $Xi,$T2 # Karatsuba pre-processing 540 movdqu $Xi,0x40($Htbl) # save H^4 541 palignr \$8,$T1,$T2 # low part is H^3.lo^H^3.hi... 542 movdqu $T2,0x50($Htbl) # save Karatsuba "salt" 543___ 544} 545$code.=<<___ if ($win64); 546 movaps (%rsp),%xmm6 547 lea 0x18(%rsp),%rsp 548.LSEH_end_gcm_init_clmul: 549___ 550$code.=<<___; 551 ret 552.size gcm_init_clmul,.-gcm_init_clmul 553___ 554} 555 556{ my ($Xip,$Htbl)=@_4args; 557 558$code.=<<___; 559.globl gcm_gmult_clmul 560.type gcm_gmult_clmul,\@abi-omnipotent 561.align 16 562gcm_gmult_clmul: 563.L_gmult_clmul: 564 movdqu ($Xip),$Xi 565 movdqa .Lbswap_mask(%rip),$T3 566 movdqu ($Htbl),$Hkey 567 movdqu 0x20($Htbl),$T2 568 pshufb $T3,$Xi 569___ 570 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$T2); 571$code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0)); 572 # experimental alternative. special thing about is that there 573 # no dependency between the two multiplications... 574 mov \$`0xE1<<1`,%eax 575 mov \$0xA040608020C0E000,%r10 # ((7..0)·0xE0)&0xff 576 mov \$0x07,%r11d 577 movq %rax,$T1 578 movq %r10,$T2 579 movq %r11,$T3 # borrow $T3 580 pand $Xi,$T3 581 pshufb $T3,$T2 # ($Xi&7)·0xE0 582 movq %rax,$T3 583 pclmulqdq \$0x00,$Xi,$T1 # ·(0xE1<<1) 584 pxor $Xi,$T2 585 pslldq \$15,$T2 586 paddd $T2,$T2 # <<(64+56+1) 587 pxor $T2,$Xi 588 pclmulqdq \$0x01,$T3,$Xi 589 movdqa .Lbswap_mask(%rip),$T3 # reload $T3 590 psrldq \$1,$T1 591 pxor $T1,$Xhi 592 pslldq \$7,$Xi 593 pxor $Xhi,$Xi 594___ 595$code.=<<___; 596 pshufb $T3,$Xi 597 movdqu $Xi,($Xip) 598 ret 599.size gcm_gmult_clmul,.-gcm_gmult_clmul 600___ 601} 602 603{ my ($Xip,$Htbl,$inp,$len)=@_4args; 604 my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7)); 605 my ($T1,$T2,$T3)=map("%xmm$_",(8..10)); 606 607$code.=<<___; 608.globl gcm_ghash_clmul 609.type gcm_ghash_clmul,\@abi-omnipotent 610.align 32 611gcm_ghash_clmul: 612.L_ghash_clmul: 613___ 614$code.=<<___ if ($win64); 615 lea -0x88(%rsp),%rax 616.LSEH_begin_gcm_ghash_clmul: 617 # I can't trust assembler to use specific encoding:-( 618 .byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp 619 .byte 0x0f,0x29,0x70,0xe0 #movaps %xmm6,-0x20(%rax) 620 .byte 0x0f,0x29,0x78,0xf0 #movaps %xmm7,-0x10(%rax) 621 .byte 0x44,0x0f,0x29,0x00 #movaps %xmm8,0(%rax) 622 .byte 0x44,0x0f,0x29,0x48,0x10 #movaps %xmm9,0x10(%rax) 623 .byte 0x44,0x0f,0x29,0x50,0x20 #movaps %xmm10,0x20(%rax) 624 .byte 0x44,0x0f,0x29,0x58,0x30 #movaps %xmm11,0x30(%rax) 625 .byte 0x44,0x0f,0x29,0x60,0x40 #movaps %xmm12,0x40(%rax) 626 .byte 0x44,0x0f,0x29,0x68,0x50 #movaps %xmm13,0x50(%rax) 627 .byte 0x44,0x0f,0x29,0x70,0x60 #movaps %xmm14,0x60(%rax) 628 .byte 0x44,0x0f,0x29,0x78,0x70 #movaps %xmm15,0x70(%rax) 629___ 630$code.=<<___; 631 movdqa .Lbswap_mask(%rip),$T3 632 633 movdqu ($Xip),$Xi 634 movdqu ($Htbl),$Hkey 635 movdqu 0x20($Htbl),$HK 636 pshufb $T3,$Xi 637 638 sub \$0x10,$len 639 jz .Lodd_tail 640 641 movdqu 0x10($Htbl),$Hkey2 642___ 643if ($do4xaggr) { 644my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15)); 645 646$code.=<<___; 647 mov OPENSSL_ia32cap_P+4(%rip),%eax 648 cmp \$0x30,$len 649 jb .Lskip4x 650 651 and \$`1<<26|1<<22`,%eax # isolate MOVBE+XSAVE 652 cmp \$`1<<22`,%eax # check for MOVBE without XSAVE 653 je .Lskip4x 654 655 sub \$0x30,$len 656 mov \$0xA040608020C0E000,%rax # ((7..0)·0xE0)&0xff 657 movdqu 0x30($Htbl),$Hkey3 658 movdqu 0x40($Htbl),$Hkey4 659 660 ####### 661 # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P 662 # 663 movdqu 0x30($inp),$Xln 664 movdqu 0x20($inp),$Xl 665 pshufb $T3,$Xln 666 pshufb $T3,$Xl 667 movdqa $Xln,$Xhn 668 pshufd \$0b01001110,$Xln,$Xmn 669 pxor $Xln,$Xmn 670 pclmulqdq \$0x00,$Hkey,$Xln 671 pclmulqdq \$0x11,$Hkey,$Xhn 672 pclmulqdq \$0x00,$HK,$Xmn 673 674 movdqa $Xl,$Xh 675 pshufd \$0b01001110,$Xl,$Xm 676 pxor $Xl,$Xm 677 pclmulqdq \$0x00,$Hkey2,$Xl 678 pclmulqdq \$0x11,$Hkey2,$Xh 679 pclmulqdq \$0x10,$HK,$Xm 680 xorps $Xl,$Xln 681 xorps $Xh,$Xhn 682 movups 0x50($Htbl),$HK 683 xorps $Xm,$Xmn 684 685 movdqu 0x10($inp),$Xl 686 movdqu 0($inp),$T1 687 pshufb $T3,$Xl 688 pshufb $T3,$T1 689 movdqa $Xl,$Xh 690 pshufd \$0b01001110,$Xl,$Xm 691 pxor $T1,$Xi 692 pxor $Xl,$Xm 693 pclmulqdq \$0x00,$Hkey3,$Xl 694 movdqa $Xi,$Xhi 695 pshufd \$0b01001110,$Xi,$T1 696 pxor $Xi,$T1 697 pclmulqdq \$0x11,$Hkey3,$Xh 698 pclmulqdq \$0x00,$HK,$Xm 699 xorps $Xl,$Xln 700 xorps $Xh,$Xhn 701 702 lea 0x40($inp),$inp 703 sub \$0x40,$len 704 jc .Ltail4x 705 706 jmp .Lmod4_loop 707.align 32 708.Lmod4_loop: 709 pclmulqdq \$0x00,$Hkey4,$Xi 710 xorps $Xm,$Xmn 711 movdqu 0x30($inp),$Xl 712 pshufb $T3,$Xl 713 pclmulqdq \$0x11,$Hkey4,$Xhi 714 xorps $Xln,$Xi 715 movdqu 0x20($inp),$Xln 716 movdqa $Xl,$Xh 717 pclmulqdq \$0x10,$HK,$T1 718 pshufd \$0b01001110,$Xl,$Xm 719 xorps $Xhn,$Xhi 720 pxor $Xl,$Xm 721 pshufb $T3,$Xln 722 movups 0x20($Htbl),$HK 723 xorps $Xmn,$T1 724 pclmulqdq \$0x00,$Hkey,$Xl 725 pshufd \$0b01001110,$Xln,$Xmn 726 727 pxor $Xi,$T1 # aggregated Karatsuba post-processing 728 movdqa $Xln,$Xhn 729 pxor $Xhi,$T1 # 730 pxor $Xln,$Xmn 731 movdqa $T1,$T2 # 732 pclmulqdq \$0x11,$Hkey,$Xh 733 pslldq \$8,$T1 734 psrldq \$8,$T2 # 735 pxor $T1,$Xi 736 movdqa .L7_mask(%rip),$T1 737 pxor $T2,$Xhi # 738 movq %rax,$T2 739 740 pand $Xi,$T1 # 1st phase 741 pshufb $T1,$T2 # 742 pxor $Xi,$T2 # 743 pclmulqdq \$0x00,$HK,$Xm 744 psllq \$57,$T2 # 745 movdqa $T2,$T1 # 746 pslldq \$8,$T2 747 pclmulqdq \$0x00,$Hkey2,$Xln 748 psrldq \$8,$T1 # 749 pxor $T2,$Xi 750 pxor $T1,$Xhi # 751 movdqu 0($inp),$T1 752 753 movdqa $Xi,$T2 # 2nd phase 754 psrlq \$1,$Xi 755 pclmulqdq \$0x11,$Hkey2,$Xhn 756 xorps $Xl,$Xln 757 movdqu 0x10($inp),$Xl 758 pshufb $T3,$Xl 759 pclmulqdq \$0x10,$HK,$Xmn 760 xorps $Xh,$Xhn 761 movups 0x50($Htbl),$HK 762 pshufb $T3,$T1 763 pxor $T2,$Xhi # 764 pxor $Xi,$T2 765 psrlq \$5,$Xi 766 767 movdqa $Xl,$Xh 768 pxor $Xm,$Xmn 769 pshufd \$0b01001110,$Xl,$Xm 770 pxor $T2,$Xi # 771 pxor $T1,$Xhi 772 pxor $Xl,$Xm 773 pclmulqdq \$0x00,$Hkey3,$Xl 774 psrlq \$1,$Xi # 775 pxor $Xhi,$Xi # 776 movdqa $Xi,$Xhi 777 pclmulqdq \$0x11,$Hkey3,$Xh 778 xorps $Xl,$Xln 779 pshufd \$0b01001110,$Xi,$T1 780 pxor $Xi,$T1 781 782 pclmulqdq \$0x00,$HK,$Xm 783 xorps $Xh,$Xhn 784 785 lea 0x40($inp),$inp 786 sub \$0x40,$len 787 jnc .Lmod4_loop 788 789.Ltail4x: 790 pclmulqdq \$0x00,$Hkey4,$Xi 791 pclmulqdq \$0x11,$Hkey4,$Xhi 792 pclmulqdq \$0x10,$HK,$T1 793 xorps $Xm,$Xmn 794 xorps $Xln,$Xi 795 xorps $Xhn,$Xhi 796 pxor $Xi,$Xhi # aggregated Karatsuba post-processing 797 pxor $Xmn,$T1 798 799 pxor $Xhi,$T1 # 800 pxor $Xi,$Xhi 801 802 movdqa $T1,$T2 # 803 psrldq \$8,$T1 804 pslldq \$8,$T2 # 805 pxor $T1,$Xhi 806 pxor $T2,$Xi # 807___ 808 &reduction_alg9($Xhi,$Xi); 809$code.=<<___; 810 add \$0x40,$len 811 jz .Ldone 812 movdqu 0x20($Htbl),$HK 813 sub \$0x10,$len 814 jz .Lodd_tail 815.Lskip4x: 816___ 817} 818$code.=<<___; 819 ####### 820 # Xi+2 =[H*(Ii+1 + Xi+1)] mod P = 821 # [(H*Ii+1) + (H*Xi+1)] mod P = 822 # [(H*Ii+1) + H^2*(Ii+Xi)] mod P 823 # 824 movdqu ($inp),$T1 # Ii 825 movdqu 16($inp),$Xln # Ii+1 826 pshufb $T3,$T1 827 pshufb $T3,$Xln 828 pxor $T1,$Xi # Ii+Xi 829 830 movdqa $Xln,$Xhn 831 pshufd \$0b01001110,$Xln,$Xmn 832 pxor $Xln,$Xmn 833 pclmulqdq \$0x00,$Hkey,$Xln 834 pclmulqdq \$0x11,$Hkey,$Xhn 835 pclmulqdq \$0x00,$HK,$Xmn 836 837 lea 32($inp),$inp # i+=2 838 nop 839 sub \$0x20,$len 840 jbe .Leven_tail 841 nop 842 jmp .Lmod_loop 843 844.align 32 845.Lmod_loop: 846 movdqa $Xi,$Xhi 847 movdqa $Xmn,$T1 848 pshufd \$0b01001110,$Xi,$Xmn # 849 pxor $Xi,$Xmn # 850 851 pclmulqdq \$0x00,$Hkey2,$Xi 852 pclmulqdq \$0x11,$Hkey2,$Xhi 853 pclmulqdq \$0x10,$HK,$Xmn 854 855 pxor $Xln,$Xi # (H*Ii+1) + H^2*(Ii+Xi) 856 pxor $Xhn,$Xhi 857 movdqu ($inp),$T2 # Ii 858 pxor $Xi,$T1 # aggregated Karatsuba post-processing 859 pshufb $T3,$T2 860 movdqu 16($inp),$Xln # Ii+1 861 862 pxor $Xhi,$T1 863 pxor $T2,$Xhi # "Ii+Xi", consume early 864 pxor $T1,$Xmn 865 pshufb $T3,$Xln 866 movdqa $Xmn,$T1 # 867 psrldq \$8,$T1 868 pslldq \$8,$Xmn # 869 pxor $T1,$Xhi 870 pxor $Xmn,$Xi # 871 872 movdqa $Xln,$Xhn # 873 874 movdqa $Xi,$T2 # 1st phase 875 movdqa $Xi,$T1 876 psllq \$5,$Xi 877 pxor $Xi,$T1 # 878 pclmulqdq \$0x00,$Hkey,$Xln ####### 879 psllq \$1,$Xi 880 pxor $T1,$Xi # 881 psllq \$57,$Xi # 882 movdqa $Xi,$T1 # 883 pslldq \$8,$Xi 884 psrldq \$8,$T1 # 885 pxor $T2,$Xi 886 pshufd \$0b01001110,$Xhn,$Xmn 887 pxor $T1,$Xhi # 888 pxor $Xhn,$Xmn # 889 890 movdqa $Xi,$T2 # 2nd phase 891 psrlq \$1,$Xi 892 pclmulqdq \$0x11,$Hkey,$Xhn ####### 893 pxor $T2,$Xhi # 894 pxor $Xi,$T2 895 psrlq \$5,$Xi 896 pxor $T2,$Xi # 897 lea 32($inp),$inp 898 psrlq \$1,$Xi # 899 pclmulqdq \$0x00,$HK,$Xmn ####### 900 pxor $Xhi,$Xi # 901 902 sub \$0x20,$len 903 ja .Lmod_loop 904 905.Leven_tail: 906 movdqa $Xi,$Xhi 907 movdqa $Xmn,$T1 908 pshufd \$0b01001110,$Xi,$Xmn # 909 pxor $Xi,$Xmn # 910 911 pclmulqdq \$0x00,$Hkey2,$Xi 912 pclmulqdq \$0x11,$Hkey2,$Xhi 913 pclmulqdq \$0x10,$HK,$Xmn 914 915 pxor $Xln,$Xi # (H*Ii+1) + H^2*(Ii+Xi) 916 pxor $Xhn,$Xhi 917 pxor $Xi,$T1 918 pxor $Xhi,$T1 919 pxor $T1,$Xmn 920 movdqa $Xmn,$T1 # 921 psrldq \$8,$T1 922 pslldq \$8,$Xmn # 923 pxor $T1,$Xhi 924 pxor $Xmn,$Xi # 925___ 926 &reduction_alg9 ($Xhi,$Xi); 927$code.=<<___; 928 test $len,$len 929 jnz .Ldone 930 931.Lodd_tail: 932 movdqu ($inp),$T1 # Ii 933 pshufb $T3,$T1 934 pxor $T1,$Xi # Ii+Xi 935___ 936 &clmul64x64_T2 ($Xhi,$Xi,$Hkey,$HK); # H*(Ii+Xi) 937 &reduction_alg9 ($Xhi,$Xi); 938$code.=<<___; 939.Ldone: 940 pshufb $T3,$Xi 941 movdqu $Xi,($Xip) 942___ 943$code.=<<___ if ($win64); 944 movaps (%rsp),%xmm6 945 movaps 0x10(%rsp),%xmm7 946 movaps 0x20(%rsp),%xmm8 947 movaps 0x30(%rsp),%xmm9 948 movaps 0x40(%rsp),%xmm10 949 movaps 0x50(%rsp),%xmm11 950 movaps 0x60(%rsp),%xmm12 951 movaps 0x70(%rsp),%xmm13 952 movaps 0x80(%rsp),%xmm14 953 movaps 0x90(%rsp),%xmm15 954 lea 0xa8(%rsp),%rsp 955.LSEH_end_gcm_ghash_clmul: 956___ 957$code.=<<___; 958 ret 959.size gcm_ghash_clmul,.-gcm_ghash_clmul 960___ 961} 962 963$code.=<<___; 964.globl gcm_init_avx 965.type gcm_init_avx,\@abi-omnipotent 966.align 32 967gcm_init_avx: 968___ 969if ($avx) { 970my ($Htbl,$Xip)=@_4args; 971my $HK="%xmm6"; 972 973$code.=<<___ if ($win64); 974.LSEH_begin_gcm_init_avx: 975 # I can't trust assembler to use specific encoding:-( 976 .byte 0x48,0x83,0xec,0x18 #sub $0x18,%rsp 977 .byte 0x0f,0x29,0x34,0x24 #movaps %xmm6,(%rsp) 978___ 979$code.=<<___; 980 vzeroupper 981 982 vmovdqu ($Xip),$Hkey 983 vpshufd \$0b01001110,$Hkey,$Hkey # dword swap 984 985 # <<1 twist 986 vpshufd \$0b11111111,$Hkey,$T2 # broadcast uppermost dword 987 vpsrlq \$63,$Hkey,$T1 988 vpsllq \$1,$Hkey,$Hkey 989 vpxor $T3,$T3,$T3 # 990 vpcmpgtd $T2,$T3,$T3 # broadcast carry bit 991 vpslldq \$8,$T1,$T1 992 vpor $T1,$Hkey,$Hkey # H<<=1 993 994 # magic reduction 995 vpand .L0x1c2_polynomial(%rip),$T3,$T3 996 vpxor $T3,$Hkey,$Hkey # if(carry) H^=0x1c2_polynomial 997 998 vpunpckhqdq $Hkey,$Hkey,$HK 999 vmovdqa $Hkey,$Xi 1000 vpxor $Hkey,$HK,$HK 1001 mov \$4,%r10 # up to H^8 1002 jmp .Linit_start_avx 1003___ 1004 1005sub clmul64x64_avx { 1006my ($Xhi,$Xi,$Hkey,$HK)=@_; 1007 1008if (!defined($HK)) { $HK = $T2; 1009$code.=<<___; 1010 vpunpckhqdq $Xi,$Xi,$T1 1011 vpunpckhqdq $Hkey,$Hkey,$T2 1012 vpxor $Xi,$T1,$T1 # 1013 vpxor $Hkey,$T2,$T2 1014___ 1015} else { 1016$code.=<<___; 1017 vpunpckhqdq $Xi,$Xi,$T1 1018 vpxor $Xi,$T1,$T1 # 1019___ 1020} 1021$code.=<<___; 1022 vpclmulqdq \$0x11,$Hkey,$Xi,$Xhi ####### 1023 vpclmulqdq \$0x00,$Hkey,$Xi,$Xi ####### 1024 vpclmulqdq \$0x00,$HK,$T1,$T1 ####### 1025 vpxor $Xi,$Xhi,$T2 # 1026 vpxor $T2,$T1,$T1 # 1027 1028 vpslldq \$8,$T1,$T2 # 1029 vpsrldq \$8,$T1,$T1 1030 vpxor $T2,$Xi,$Xi # 1031 vpxor $T1,$Xhi,$Xhi 1032___ 1033} 1034 1035sub reduction_avx { 1036my ($Xhi,$Xi) = @_; 1037 1038$code.=<<___; 1039 vpsllq \$57,$Xi,$T1 # 1st phase 1040 vpsllq \$62,$Xi,$T2 1041 vpxor $T1,$T2,$T2 # 1042 vpsllq \$63,$Xi,$T1 1043 vpxor $T1,$T2,$T2 # 1044 vpslldq \$8,$T2,$T1 # 1045 vpsrldq \$8,$T2,$T2 1046 vpxor $T1,$Xi,$Xi # 1047 vpxor $T2,$Xhi,$Xhi 1048 1049 vpsrlq \$1,$Xi,$T2 # 2nd phase 1050 vpxor $Xi,$Xhi,$Xhi 1051 vpxor $T2,$Xi,$Xi # 1052 vpsrlq \$5,$T2,$T2 1053 vpxor $T2,$Xi,$Xi # 1054 vpsrlq \$1,$Xi,$Xi # 1055 vpxor $Xhi,$Xi,$Xi # 1056___ 1057} 1058 1059$code.=<<___; 1060.align 32 1061.Linit_loop_avx: 1062 vpalignr \$8,$T1,$T2,$T3 # low part is H.lo^H.hi... 1063 vmovdqu $T3,-0x10($Htbl) # save Karatsuba "salt" 1064___ 1065 &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK); # calculate H^3,5,7 1066 &reduction_avx ($Xhi,$Xi); 1067$code.=<<___; 1068.Linit_start_avx: 1069 vmovdqa $Xi,$T3 1070___ 1071 &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK); # calculate H^2,4,6,8 1072 &reduction_avx ($Xhi,$Xi); 1073$code.=<<___; 1074 vpshufd \$0b01001110,$T3,$T1 1075 vpshufd \$0b01001110,$Xi,$T2 1076 vpxor $T3,$T1,$T1 # Karatsuba pre-processing 1077 vmovdqu $T3,0x00($Htbl) # save H^1,3,5,7 1078 vpxor $Xi,$T2,$T2 # Karatsuba pre-processing 1079 vmovdqu $Xi,0x10($Htbl) # save H^2,4,6,8 1080 lea 0x30($Htbl),$Htbl 1081 sub \$1,%r10 1082 jnz .Linit_loop_avx 1083 1084 vpalignr \$8,$T2,$T1,$T3 # last "salt" is flipped 1085 vmovdqu $T3,-0x10($Htbl) 1086 1087 vzeroupper 1088___ 1089$code.=<<___ if ($win64); 1090 movaps (%rsp),%xmm6 1091 lea 0x18(%rsp),%rsp 1092.LSEH_end_gcm_init_avx: 1093___ 1094$code.=<<___; 1095 ret 1096.size gcm_init_avx,.-gcm_init_avx 1097___ 1098} else { 1099$code.=<<___; 1100 jmp .L_init_clmul 1101.size gcm_init_avx,.-gcm_init_avx 1102___ 1103} 1104 1105$code.=<<___; 1106.globl gcm_gmult_avx 1107.type gcm_gmult_avx,\@abi-omnipotent 1108.align 32 1109gcm_gmult_avx: 1110 jmp .L_gmult_clmul 1111.size gcm_gmult_avx,.-gcm_gmult_avx 1112___ 1113 1114$code.=<<___; 1115.globl gcm_ghash_avx 1116.type gcm_ghash_avx,\@abi-omnipotent 1117.align 32 1118gcm_ghash_avx: 1119___ 1120if ($avx) { 1121my ($Xip,$Htbl,$inp,$len)=@_4args; 1122my ($Xlo,$Xhi,$Xmi, 1123 $Zlo,$Zhi,$Zmi, 1124 $Hkey,$HK,$T1,$T2, 1125 $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15)); 1126 1127$code.=<<___ if ($win64); 1128 lea -0x88(%rsp),%rax 1129.LSEH_begin_gcm_ghash_avx: 1130 # I can't trust assembler to use specific encoding:-( 1131 .byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp 1132 .byte 0x0f,0x29,0x70,0xe0 #movaps %xmm6,-0x20(%rax) 1133 .byte 0x0f,0x29,0x78,0xf0 #movaps %xmm7,-0x10(%rax) 1134 .byte 0x44,0x0f,0x29,0x00 #movaps %xmm8,0(%rax) 1135 .byte 0x44,0x0f,0x29,0x48,0x10 #movaps %xmm9,0x10(%rax) 1136 .byte 0x44,0x0f,0x29,0x50,0x20 #movaps %xmm10,0x20(%rax) 1137 .byte 0x44,0x0f,0x29,0x58,0x30 #movaps %xmm11,0x30(%rax) 1138 .byte 0x44,0x0f,0x29,0x60,0x40 #movaps %xmm12,0x40(%rax) 1139 .byte 0x44,0x0f,0x29,0x68,0x50 #movaps %xmm13,0x50(%rax) 1140 .byte 0x44,0x0f,0x29,0x70,0x60 #movaps %xmm14,0x60(%rax) 1141 .byte 0x44,0x0f,0x29,0x78,0x70 #movaps %xmm15,0x70(%rax) 1142___ 1143$code.=<<___; 1144 vzeroupper 1145 1146 vmovdqu ($Xip),$Xi # load $Xi 1147 lea .L0x1c2_polynomial(%rip),%r10 1148 lea 0x40($Htbl),$Htbl # size optimization 1149 vmovdqu .Lbswap_mask(%rip),$bswap 1150 vpshufb $bswap,$Xi,$Xi 1151 cmp \$0x80,$len 1152 jb .Lshort_avx 1153 sub \$0x80,$len 1154 1155 vmovdqu 0x70($inp),$Ii # I[7] 1156 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1 1157 vpshufb $bswap,$Ii,$Ii 1158 vmovdqu 0x20-0x40($Htbl),$HK 1159 1160 vpunpckhqdq $Ii,$Ii,$T2 1161 vmovdqu 0x60($inp),$Ij # I[6] 1162 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1163 vpxor $Ii,$T2,$T2 1164 vpshufb $bswap,$Ij,$Ij 1165 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1166 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2 1167 vpunpckhqdq $Ij,$Ij,$T1 1168 vmovdqu 0x50($inp),$Ii # I[5] 1169 vpclmulqdq \$0x00,$HK,$T2,$Xmi 1170 vpxor $Ij,$T1,$T1 1171 1172 vpshufb $bswap,$Ii,$Ii 1173 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1174 vpunpckhqdq $Ii,$Ii,$T2 1175 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1176 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3 1177 vpxor $Ii,$T2,$T2 1178 vmovdqu 0x40($inp),$Ij # I[4] 1179 vpclmulqdq \$0x10,$HK,$T1,$Zmi 1180 vmovdqu 0x50-0x40($Htbl),$HK 1181 1182 vpshufb $bswap,$Ij,$Ij 1183 vpxor $Xlo,$Zlo,$Zlo 1184 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1185 vpxor $Xhi,$Zhi,$Zhi 1186 vpunpckhqdq $Ij,$Ij,$T1 1187 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1188 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4 1189 vpxor $Xmi,$Zmi,$Zmi 1190 vpclmulqdq \$0x00,$HK,$T2,$Xmi 1191 vpxor $Ij,$T1,$T1 1192 1193 vmovdqu 0x30($inp),$Ii # I[3] 1194 vpxor $Zlo,$Xlo,$Xlo 1195 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1196 vpxor $Zhi,$Xhi,$Xhi 1197 vpshufb $bswap,$Ii,$Ii 1198 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1199 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5 1200 vpxor $Zmi,$Xmi,$Xmi 1201 vpunpckhqdq $Ii,$Ii,$T2 1202 vpclmulqdq \$0x10,$HK,$T1,$Zmi 1203 vmovdqu 0x80-0x40($Htbl),$HK 1204 vpxor $Ii,$T2,$T2 1205 1206 vmovdqu 0x20($inp),$Ij # I[2] 1207 vpxor $Xlo,$Zlo,$Zlo 1208 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1209 vpxor $Xhi,$Zhi,$Zhi 1210 vpshufb $bswap,$Ij,$Ij 1211 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1212 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6 1213 vpxor $Xmi,$Zmi,$Zmi 1214 vpunpckhqdq $Ij,$Ij,$T1 1215 vpclmulqdq \$0x00,$HK,$T2,$Xmi 1216 vpxor $Ij,$T1,$T1 1217 1218 vmovdqu 0x10($inp),$Ii # I[1] 1219 vpxor $Zlo,$Xlo,$Xlo 1220 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1221 vpxor $Zhi,$Xhi,$Xhi 1222 vpshufb $bswap,$Ii,$Ii 1223 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1224 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7 1225 vpxor $Zmi,$Xmi,$Xmi 1226 vpunpckhqdq $Ii,$Ii,$T2 1227 vpclmulqdq \$0x10,$HK,$T1,$Zmi 1228 vmovdqu 0xb0-0x40($Htbl),$HK 1229 vpxor $Ii,$T2,$T2 1230 1231 vmovdqu ($inp),$Ij # I[0] 1232 vpxor $Xlo,$Zlo,$Zlo 1233 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1234 vpxor $Xhi,$Zhi,$Zhi 1235 vpshufb $bswap,$Ij,$Ij 1236 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1237 vmovdqu 0xa0-0x40($Htbl),$Hkey # $Hkey^8 1238 vpxor $Xmi,$Zmi,$Zmi 1239 vpclmulqdq \$0x10,$HK,$T2,$Xmi 1240 1241 lea 0x80($inp),$inp 1242 cmp \$0x80,$len 1243 jb .Ltail_avx 1244 1245 vpxor $Xi,$Ij,$Ij # accumulate $Xi 1246 sub \$0x80,$len 1247 jmp .Loop8x_avx 1248 1249.align 32 1250.Loop8x_avx: 1251 vpunpckhqdq $Ij,$Ij,$T1 1252 vmovdqu 0x70($inp),$Ii # I[7] 1253 vpxor $Xlo,$Zlo,$Zlo 1254 vpxor $Ij,$T1,$T1 1255 vpclmulqdq \$0x00,$Hkey,$Ij,$Xi 1256 vpshufb $bswap,$Ii,$Ii 1257 vpxor $Xhi,$Zhi,$Zhi 1258 vpclmulqdq \$0x11,$Hkey,$Ij,$Xo 1259 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1 1260 vpunpckhqdq $Ii,$Ii,$T2 1261 vpxor $Xmi,$Zmi,$Zmi 1262 vpclmulqdq \$0x00,$HK,$T1,$Tred 1263 vmovdqu 0x20-0x40($Htbl),$HK 1264 vpxor $Ii,$T2,$T2 1265 1266 vmovdqu 0x60($inp),$Ij # I[6] 1267 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1268 vpxor $Zlo,$Xi,$Xi # collect result 1269 vpshufb $bswap,$Ij,$Ij 1270 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1271 vxorps $Zhi,$Xo,$Xo 1272 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2 1273 vpunpckhqdq $Ij,$Ij,$T1 1274 vpclmulqdq \$0x00,$HK, $T2,$Xmi 1275 vpxor $Zmi,$Tred,$Tred 1276 vxorps $Ij,$T1,$T1 1277 1278 vmovdqu 0x50($inp),$Ii # I[5] 1279 vpxor $Xi,$Tred,$Tred # aggregated Karatsuba post-processing 1280 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1281 vpxor $Xo,$Tred,$Tred 1282 vpslldq \$8,$Tred,$T2 1283 vpxor $Xlo,$Zlo,$Zlo 1284 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1285 vpsrldq \$8,$Tred,$Tred 1286 vpxor $T2, $Xi, $Xi 1287 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3 1288 vpshufb $bswap,$Ii,$Ii 1289 vxorps $Tred,$Xo, $Xo 1290 vpxor $Xhi,$Zhi,$Zhi 1291 vpunpckhqdq $Ii,$Ii,$T2 1292 vpclmulqdq \$0x10,$HK, $T1,$Zmi 1293 vmovdqu 0x50-0x40($Htbl),$HK 1294 vpxor $Ii,$T2,$T2 1295 vpxor $Xmi,$Zmi,$Zmi 1296 1297 vmovdqu 0x40($inp),$Ij # I[4] 1298 vpalignr \$8,$Xi,$Xi,$Tred # 1st phase 1299 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1300 vpshufb $bswap,$Ij,$Ij 1301 vpxor $Zlo,$Xlo,$Xlo 1302 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1303 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4 1304 vpunpckhqdq $Ij,$Ij,$T1 1305 vpxor $Zhi,$Xhi,$Xhi 1306 vpclmulqdq \$0x00,$HK, $T2,$Xmi 1307 vxorps $Ij,$T1,$T1 1308 vpxor $Zmi,$Xmi,$Xmi 1309 1310 vmovdqu 0x30($inp),$Ii # I[3] 1311 vpclmulqdq \$0x10,(%r10),$Xi,$Xi 1312 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1313 vpshufb $bswap,$Ii,$Ii 1314 vpxor $Xlo,$Zlo,$Zlo 1315 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1316 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5 1317 vpunpckhqdq $Ii,$Ii,$T2 1318 vpxor $Xhi,$Zhi,$Zhi 1319 vpclmulqdq \$0x10,$HK, $T1,$Zmi 1320 vmovdqu 0x80-0x40($Htbl),$HK 1321 vpxor $Ii,$T2,$T2 1322 vpxor $Xmi,$Zmi,$Zmi 1323 1324 vmovdqu 0x20($inp),$Ij # I[2] 1325 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1326 vpshufb $bswap,$Ij,$Ij 1327 vpxor $Zlo,$Xlo,$Xlo 1328 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1329 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6 1330 vpunpckhqdq $Ij,$Ij,$T1 1331 vpxor $Zhi,$Xhi,$Xhi 1332 vpclmulqdq \$0x00,$HK, $T2,$Xmi 1333 vpxor $Ij,$T1,$T1 1334 vpxor $Zmi,$Xmi,$Xmi 1335 vxorps $Tred,$Xi,$Xi 1336 1337 vmovdqu 0x10($inp),$Ii # I[1] 1338 vpalignr \$8,$Xi,$Xi,$Tred # 2nd phase 1339 vpclmulqdq \$0x00,$Hkey,$Ij,$Zlo 1340 vpshufb $bswap,$Ii,$Ii 1341 vpxor $Xlo,$Zlo,$Zlo 1342 vpclmulqdq \$0x11,$Hkey,$Ij,$Zhi 1343 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7 1344 vpclmulqdq \$0x10,(%r10),$Xi,$Xi 1345 vxorps $Xo,$Tred,$Tred 1346 vpunpckhqdq $Ii,$Ii,$T2 1347 vpxor $Xhi,$Zhi,$Zhi 1348 vpclmulqdq \$0x10,$HK, $T1,$Zmi 1349 vmovdqu 0xb0-0x40($Htbl),$HK 1350 vpxor $Ii,$T2,$T2 1351 vpxor $Xmi,$Zmi,$Zmi 1352 1353 vmovdqu ($inp),$Ij # I[0] 1354 vpclmulqdq \$0x00,$Hkey,$Ii,$Xlo 1355 vpshufb $bswap,$Ij,$Ij 1356 vpclmulqdq \$0x11,$Hkey,$Ii,$Xhi 1357 vmovdqu 0xa0-0x40($Htbl),$Hkey # $Hkey^8 1358 vpxor $Tred,$Ij,$Ij 1359 vpclmulqdq \$0x10,$HK, $T2,$Xmi 1360 vpxor $Xi,$Ij,$Ij # accumulate $Xi 1361 1362 lea 0x80($inp),$inp 1363 sub \$0x80,$len 1364 jnc .Loop8x_avx 1365 1366 add \$0x80,$len 1367 jmp .Ltail_no_xor_avx 1368 1369.align 32 1370.Lshort_avx: 1371 vmovdqu -0x10($inp,$len),$Ii # very last word 1372 lea ($inp,$len),$inp 1373 vmovdqu 0x00-0x40($Htbl),$Hkey # $Hkey^1 1374 vmovdqu 0x20-0x40($Htbl),$HK 1375 vpshufb $bswap,$Ii,$Ij 1376 1377 vmovdqa $Xlo,$Zlo # subtle way to zero $Zlo, 1378 vmovdqa $Xhi,$Zhi # $Zhi and 1379 vmovdqa $Xmi,$Zmi # $Zmi 1380 sub \$0x10,$len 1381 jz .Ltail_avx 1382 1383 vpunpckhqdq $Ij,$Ij,$T1 1384 vpxor $Xlo,$Zlo,$Zlo 1385 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1386 vpxor $Ij,$T1,$T1 1387 vmovdqu -0x20($inp),$Ii 1388 vpxor $Xhi,$Zhi,$Zhi 1389 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1390 vmovdqu 0x10-0x40($Htbl),$Hkey # $Hkey^2 1391 vpshufb $bswap,$Ii,$Ij 1392 vpxor $Xmi,$Zmi,$Zmi 1393 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1394 vpsrldq \$8,$HK,$HK 1395 sub \$0x10,$len 1396 jz .Ltail_avx 1397 1398 vpunpckhqdq $Ij,$Ij,$T1 1399 vpxor $Xlo,$Zlo,$Zlo 1400 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1401 vpxor $Ij,$T1,$T1 1402 vmovdqu -0x30($inp),$Ii 1403 vpxor $Xhi,$Zhi,$Zhi 1404 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1405 vmovdqu 0x30-0x40($Htbl),$Hkey # $Hkey^3 1406 vpshufb $bswap,$Ii,$Ij 1407 vpxor $Xmi,$Zmi,$Zmi 1408 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1409 vmovdqu 0x50-0x40($Htbl),$HK 1410 sub \$0x10,$len 1411 jz .Ltail_avx 1412 1413 vpunpckhqdq $Ij,$Ij,$T1 1414 vpxor $Xlo,$Zlo,$Zlo 1415 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1416 vpxor $Ij,$T1,$T1 1417 vmovdqu -0x40($inp),$Ii 1418 vpxor $Xhi,$Zhi,$Zhi 1419 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1420 vmovdqu 0x40-0x40($Htbl),$Hkey # $Hkey^4 1421 vpshufb $bswap,$Ii,$Ij 1422 vpxor $Xmi,$Zmi,$Zmi 1423 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1424 vpsrldq \$8,$HK,$HK 1425 sub \$0x10,$len 1426 jz .Ltail_avx 1427 1428 vpunpckhqdq $Ij,$Ij,$T1 1429 vpxor $Xlo,$Zlo,$Zlo 1430 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1431 vpxor $Ij,$T1,$T1 1432 vmovdqu -0x50($inp),$Ii 1433 vpxor $Xhi,$Zhi,$Zhi 1434 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1435 vmovdqu 0x60-0x40($Htbl),$Hkey # $Hkey^5 1436 vpshufb $bswap,$Ii,$Ij 1437 vpxor $Xmi,$Zmi,$Zmi 1438 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1439 vmovdqu 0x80-0x40($Htbl),$HK 1440 sub \$0x10,$len 1441 jz .Ltail_avx 1442 1443 vpunpckhqdq $Ij,$Ij,$T1 1444 vpxor $Xlo,$Zlo,$Zlo 1445 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1446 vpxor $Ij,$T1,$T1 1447 vmovdqu -0x60($inp),$Ii 1448 vpxor $Xhi,$Zhi,$Zhi 1449 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1450 vmovdqu 0x70-0x40($Htbl),$Hkey # $Hkey^6 1451 vpshufb $bswap,$Ii,$Ij 1452 vpxor $Xmi,$Zmi,$Zmi 1453 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1454 vpsrldq \$8,$HK,$HK 1455 sub \$0x10,$len 1456 jz .Ltail_avx 1457 1458 vpunpckhqdq $Ij,$Ij,$T1 1459 vpxor $Xlo,$Zlo,$Zlo 1460 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1461 vpxor $Ij,$T1,$T1 1462 vmovdqu -0x70($inp),$Ii 1463 vpxor $Xhi,$Zhi,$Zhi 1464 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1465 vmovdqu 0x90-0x40($Htbl),$Hkey # $Hkey^7 1466 vpshufb $bswap,$Ii,$Ij 1467 vpxor $Xmi,$Zmi,$Zmi 1468 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1469 vmovq 0xb8-0x40($Htbl),$HK 1470 sub \$0x10,$len 1471 jmp .Ltail_avx 1472 1473.align 32 1474.Ltail_avx: 1475 vpxor $Xi,$Ij,$Ij # accumulate $Xi 1476.Ltail_no_xor_avx: 1477 vpunpckhqdq $Ij,$Ij,$T1 1478 vpxor $Xlo,$Zlo,$Zlo 1479 vpclmulqdq \$0x00,$Hkey,$Ij,$Xlo 1480 vpxor $Ij,$T1,$T1 1481 vpxor $Xhi,$Zhi,$Zhi 1482 vpclmulqdq \$0x11,$Hkey,$Ij,$Xhi 1483 vpxor $Xmi,$Zmi,$Zmi 1484 vpclmulqdq \$0x00,$HK,$T1,$Xmi 1485 1486 vmovdqu (%r10),$Tred 1487 1488 vpxor $Xlo,$Zlo,$Xi 1489 vpxor $Xhi,$Zhi,$Xo 1490 vpxor $Xmi,$Zmi,$Zmi 1491 1492 vpxor $Xi, $Zmi,$Zmi # aggregated Karatsuba post-processing 1493 vpxor $Xo, $Zmi,$Zmi 1494 vpslldq \$8, $Zmi,$T2 1495 vpsrldq \$8, $Zmi,$Zmi 1496 vpxor $T2, $Xi, $Xi 1497 vpxor $Zmi,$Xo, $Xo 1498 1499 vpclmulqdq \$0x10,$Tred,$Xi,$T2 # 1st phase 1500 vpalignr \$8,$Xi,$Xi,$Xi 1501 vpxor $T2,$Xi,$Xi 1502 1503 vpclmulqdq \$0x10,$Tred,$Xi,$T2 # 2nd phase 1504 vpalignr \$8,$Xi,$Xi,$Xi 1505 vpxor $Xo,$Xi,$Xi 1506 vpxor $T2,$Xi,$Xi 1507 1508 cmp \$0,$len 1509 jne .Lshort_avx 1510 1511 vpshufb $bswap,$Xi,$Xi 1512 vmovdqu $Xi,($Xip) 1513 vzeroupper 1514___ 1515$code.=<<___ if ($win64); 1516 movaps (%rsp),%xmm6 1517 movaps 0x10(%rsp),%xmm7 1518 movaps 0x20(%rsp),%xmm8 1519 movaps 0x30(%rsp),%xmm9 1520 movaps 0x40(%rsp),%xmm10 1521 movaps 0x50(%rsp),%xmm11 1522 movaps 0x60(%rsp),%xmm12 1523 movaps 0x70(%rsp),%xmm13 1524 movaps 0x80(%rsp),%xmm14 1525 movaps 0x90(%rsp),%xmm15 1526 lea 0xa8(%rsp),%rsp 1527.LSEH_end_gcm_ghash_avx: 1528___ 1529$code.=<<___; 1530 ret 1531.size gcm_ghash_avx,.-gcm_ghash_avx 1532___ 1533} else { 1534$code.=<<___; 1535 jmp .L_ghash_clmul 1536.size gcm_ghash_avx,.-gcm_ghash_avx 1537___ 1538} 1539 1540$code.=<<___; 1541.align 64 1542.Lbswap_mask: 1543 .byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 1544.L0x1c2_polynomial: 1545 .byte 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2 1546.L7_mask: 1547 .long 7,0,7,0 1548.L7_mask_poly: 1549 .long 7,0,`0xE1<<1`,0 1550.align 64 1551.type .Lrem_4bit,\@object 1552.Lrem_4bit: 1553 .long 0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16` 1554 .long 0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16` 1555 .long 0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16` 1556 .long 0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16` 1557.type .Lrem_8bit,\@object 1558.Lrem_8bit: 1559 .value 0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E 1560 .value 0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E 1561 .value 0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E 1562 .value 0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E 1563 .value 0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E 1564 .value 0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E 1565 .value 0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E 1566 .value 0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E 1567 .value 0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE 1568 .value 0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE 1569 .value 0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE 1570 .value 0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE 1571 .value 0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E 1572 .value 0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E 1573 .value 0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE 1574 .value 0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE 1575 .value 0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E 1576 .value 0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E 1577 .value 0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E 1578 .value 0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E 1579 .value 0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E 1580 .value 0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E 1581 .value 0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E 1582 .value 0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E 1583 .value 0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE 1584 .value 0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE 1585 .value 0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE 1586 .value 0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE 1587 .value 0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E 1588 .value 0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E 1589 .value 0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE 1590 .value 0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE 1591 1592.asciz "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>" 1593.align 64 1594___ 1595 1596# EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame, 1597# CONTEXT *context,DISPATCHER_CONTEXT *disp) 1598if ($win64) { 1599$rec="%rcx"; 1600$frame="%rdx"; 1601$context="%r8"; 1602$disp="%r9"; 1603 1604$code.=<<___; 1605.extern __imp_RtlVirtualUnwind 1606.type se_handler,\@abi-omnipotent 1607.align 16 1608se_handler: 1609 push %rsi 1610 push %rdi 1611 push %rbx 1612 push %rbp 1613 push %r12 1614 push %r13 1615 push %r14 1616 push %r15 1617 pushfq 1618 sub \$64,%rsp 1619 1620 mov 120($context),%rax # pull context->Rax 1621 mov 248($context),%rbx # pull context->Rip 1622 1623 mov 8($disp),%rsi # disp->ImageBase 1624 mov 56($disp),%r11 # disp->HandlerData 1625 1626 mov 0(%r11),%r10d # HandlerData[0] 1627 lea (%rsi,%r10),%r10 # prologue label 1628 cmp %r10,%rbx # context->Rip<prologue label 1629 jb .Lin_prologue 1630 1631 mov 152($context),%rax # pull context->Rsp 1632 1633 mov 4(%r11),%r10d # HandlerData[1] 1634 lea (%rsi,%r10),%r10 # epilogue label 1635 cmp %r10,%rbx # context->Rip>=epilogue label 1636 jae .Lin_prologue 1637 1638 lea 48+280(%rax),%rax # adjust "rsp" 1639 1640 mov -8(%rax),%rbx 1641 mov -16(%rax),%rbp 1642 mov -24(%rax),%r12 1643 mov -32(%rax),%r13 1644 mov -40(%rax),%r14 1645 mov -48(%rax),%r15 1646 mov %rbx,144($context) # restore context->Rbx 1647 mov %rbp,160($context) # restore context->Rbp 1648 mov %r12,216($context) # restore context->R12 1649 mov %r13,224($context) # restore context->R13 1650 mov %r14,232($context) # restore context->R14 1651 mov %r15,240($context) # restore context->R15 1652 1653.Lin_prologue: 1654 mov 8(%rax),%rdi 1655 mov 16(%rax),%rsi 1656 mov %rax,152($context) # restore context->Rsp 1657 mov %rsi,168($context) # restore context->Rsi 1658 mov %rdi,176($context) # restore context->Rdi 1659 1660 mov 40($disp),%rdi # disp->ContextRecord 1661 mov $context,%rsi # context 1662 mov \$`1232/8`,%ecx # sizeof(CONTEXT) 1663 .long 0xa548f3fc # cld; rep movsq 1664 1665 mov $disp,%rsi 1666 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER 1667 mov 8(%rsi),%rdx # arg2, disp->ImageBase 1668 mov 0(%rsi),%r8 # arg3, disp->ControlPc 1669 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry 1670 mov 40(%rsi),%r10 # disp->ContextRecord 1671 lea 56(%rsi),%r11 # &disp->HandlerData 1672 lea 24(%rsi),%r12 # &disp->EstablisherFrame 1673 mov %r10,32(%rsp) # arg5 1674 mov %r11,40(%rsp) # arg6 1675 mov %r12,48(%rsp) # arg7 1676 mov %rcx,56(%rsp) # arg8, (NULL) 1677 call *__imp_RtlVirtualUnwind(%rip) 1678 1679 mov \$1,%eax # ExceptionContinueSearch 1680 add \$64,%rsp 1681 popfq 1682 pop %r15 1683 pop %r14 1684 pop %r13 1685 pop %r12 1686 pop %rbp 1687 pop %rbx 1688 pop %rdi 1689 pop %rsi 1690 ret 1691.size se_handler,.-se_handler 1692 1693.section .pdata 1694.align 4 1695 .rva .LSEH_begin_gcm_gmult_4bit 1696 .rva .LSEH_end_gcm_gmult_4bit 1697 .rva .LSEH_info_gcm_gmult_4bit 1698 1699 .rva .LSEH_begin_gcm_ghash_4bit 1700 .rva .LSEH_end_gcm_ghash_4bit 1701 .rva .LSEH_info_gcm_ghash_4bit 1702 1703 .rva .LSEH_begin_gcm_init_clmul 1704 .rva .LSEH_end_gcm_init_clmul 1705 .rva .LSEH_info_gcm_init_clmul 1706 1707 .rva .LSEH_begin_gcm_ghash_clmul 1708 .rva .LSEH_end_gcm_ghash_clmul 1709 .rva .LSEH_info_gcm_ghash_clmul 1710___ 1711$code.=<<___ if ($avx); 1712 .rva .LSEH_begin_gcm_init_avx 1713 .rva .LSEH_end_gcm_init_avx 1714 .rva .LSEH_info_gcm_init_clmul 1715 1716 .rva .LSEH_begin_gcm_ghash_avx 1717 .rva .LSEH_end_gcm_ghash_avx 1718 .rva .LSEH_info_gcm_ghash_clmul 1719___ 1720$code.=<<___; 1721.section .xdata 1722.align 8 1723.LSEH_info_gcm_gmult_4bit: 1724 .byte 9,0,0,0 1725 .rva se_handler 1726 .rva .Lgmult_prologue,.Lgmult_epilogue # HandlerData 1727.LSEH_info_gcm_ghash_4bit: 1728 .byte 9,0,0,0 1729 .rva se_handler 1730 .rva .Lghash_prologue,.Lghash_epilogue # HandlerData 1731.LSEH_info_gcm_init_clmul: 1732 .byte 0x01,0x08,0x03,0x00 1733 .byte 0x08,0x68,0x00,0x00 #movaps 0x00(rsp),xmm6 1734 .byte 0x04,0x22,0x00,0x00 #sub rsp,0x18 1735.LSEH_info_gcm_ghash_clmul: 1736 .byte 0x01,0x33,0x16,0x00 1737 .byte 0x33,0xf8,0x09,0x00 #movaps 0x90(rsp),xmm15 1738 .byte 0x2e,0xe8,0x08,0x00 #movaps 0x80(rsp),xmm14 1739 .byte 0x29,0xd8,0x07,0x00 #movaps 0x70(rsp),xmm13 1740 .byte 0x24,0xc8,0x06,0x00 #movaps 0x60(rsp),xmm12 1741 .byte 0x1f,0xb8,0x05,0x00 #movaps 0x50(rsp),xmm11 1742 .byte 0x1a,0xa8,0x04,0x00 #movaps 0x40(rsp),xmm10 1743 .byte 0x15,0x98,0x03,0x00 #movaps 0x30(rsp),xmm9 1744 .byte 0x10,0x88,0x02,0x00 #movaps 0x20(rsp),xmm8 1745 .byte 0x0c,0x78,0x01,0x00 #movaps 0x10(rsp),xmm7 1746 .byte 0x08,0x68,0x00,0x00 #movaps 0x00(rsp),xmm6 1747 .byte 0x04,0x01,0x15,0x00 #sub rsp,0xa8 1748___ 1749} 1750 1751$code =~ s/\`([^\`]*)\`/eval($1)/gem; 1752 1753print $code; 1754 1755close STDOUT; 1756