1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "src/base/cpu.h"
6
7 #if V8_LIBC_MSVCRT
8 #include <intrin.h> // __cpuid()
9 #endif
10 #if V8_OS_LINUX
11 #include <linux/auxvec.h> // AT_HWCAP
12 #endif
13 #if V8_GLIBC_PREREQ(2, 16)
14 #include <sys/auxv.h> // getauxval()
15 #endif
16 #if V8_OS_QNX
17 #include <sys/syspage.h> // cpuinfo
18 #endif
19 #if V8_OS_LINUX && V8_HOST_ARCH_PPC
20 #include <elf.h>
21 #endif
22 #if V8_OS_AIX
23 #include <sys/systemcfg.h> // _system_configuration
24 #ifndef POWER_8
25 #define POWER_8 0x10000
26 #endif
27 #endif
28 #if V8_OS_POSIX
29 #include <unistd.h> // sysconf()
30 #endif
31
32 #include <ctype.h>
33 #include <limits.h>
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37 #include <algorithm>
38
39 #include "src/base/logging.h"
40 #if V8_OS_WIN
41 #include "src/base/win32-headers.h" // NOLINT
42 #endif
43
44 namespace v8 {
45 namespace base {
46
47 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
48
49 // Define __cpuid() for non-MSVC libraries.
50 #if !V8_LIBC_MSVCRT
51
__cpuid(int cpu_info[4],int info_type)52 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) {
53 // Clear ecx to align with __cpuid() of MSVC:
54 // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx
55 #if defined(__i386__) && defined(__pic__)
56 // Make sure to preserve ebx, which contains the pointer
57 // to the GOT in case we're generating PIC.
58 __asm__ volatile(
59 "mov %%ebx, %%edi\n\t"
60 "cpuid\n\t"
61 "xchg %%edi, %%ebx\n\t"
62 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
63 "=d"(cpu_info[3])
64 : "a"(info_type), "c"(0));
65 #else
66 __asm__ volatile("cpuid \n\t"
67 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
68 "=d"(cpu_info[3])
69 : "a"(info_type), "c"(0));
70 #endif // defined(__i386__) && defined(__pic__)
71 }
72
73 #endif // !V8_LIBC_MSVCRT
74
75 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \
76 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
77
78 #if V8_OS_LINUX
79
80 #if V8_HOST_ARCH_ARM
81
82 // See <uapi/asm/hwcap.h> kernel header.
83 /*
84 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
85 */
86 #define HWCAP_SWP (1 << 0)
87 #define HWCAP_HALF (1 << 1)
88 #define HWCAP_THUMB (1 << 2)
89 #define HWCAP_26BIT (1 << 3) /* Play it safe */
90 #define HWCAP_FAST_MULT (1 << 4)
91 #define HWCAP_FPA (1 << 5)
92 #define HWCAP_VFP (1 << 6)
93 #define HWCAP_EDSP (1 << 7)
94 #define HWCAP_JAVA (1 << 8)
95 #define HWCAP_IWMMXT (1 << 9)
96 #define HWCAP_CRUNCH (1 << 10)
97 #define HWCAP_THUMBEE (1 << 11)
98 #define HWCAP_NEON (1 << 12)
99 #define HWCAP_VFPv3 (1 << 13)
100 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
101 #define HWCAP_TLS (1 << 15)
102 #define HWCAP_VFPv4 (1 << 16)
103 #define HWCAP_IDIVA (1 << 17)
104 #define HWCAP_IDIVT (1 << 18)
105 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
106 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
107 #define HWCAP_LPAE (1 << 20)
108
109 static uint32_t ReadELFHWCaps() {
110 uint32_t result = 0;
111 #if V8_GLIBC_PREREQ(2, 16)
112 result = static_cast<uint32_t>(getauxval(AT_HWCAP));
113 #else
114 // Read the ELF HWCAP flags by parsing /proc/self/auxv.
115 FILE* fp = fopen("/proc/self/auxv", "r");
116 if (fp != NULL) {
117 struct { uint32_t tag; uint32_t value; } entry;
118 for (;;) {
119 size_t n = fread(&entry, sizeof(entry), 1, fp);
120 if (n == 0 || (entry.tag == 0 && entry.value == 0)) {
121 break;
122 }
123 if (entry.tag == AT_HWCAP) {
124 result = entry.value;
125 break;
126 }
127 }
128 fclose(fp);
129 }
130 #endif
131 return result;
132 }
133
134 #endif // V8_HOST_ARCH_ARM
135
136 #if V8_HOST_ARCH_MIPS
137 int __detect_fp64_mode(void) {
138 double result = 0;
139 // Bit representation of (double)1 is 0x3FF0000000000000.
140 __asm__ volatile(
141 ".set push\n\t"
142 ".set noreorder\n\t"
143 ".set oddspreg\n\t"
144 "lui $t0, 0x3FF0\n\t"
145 "ldc1 $f0, %0\n\t"
146 "mtc1 $t0, $f1\n\t"
147 "sdc1 $f0, %0\n\t"
148 ".set pop\n\t"
149 : "+m"(result)
150 :
151 : "t0", "$f0", "$f1", "memory");
152
153 return !(result == 1);
154 }
155
156
157 int __detect_mips_arch_revision(void) {
158 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
159 // kernel.
160 uint32_t result = 0;
161 __asm__ volatile(
162 "move $v0, $zero\n\t"
163 // Encoding for "addi $v0, $v0, 1" on non-r6,
164 // which is encoding for "bovc $v0, %v0, 1" on r6.
165 // Use machine code directly to avoid compilation errors with different
166 // toolchains and maintain compatibility.
167 ".word 0x20420001\n\t"
168 "sw $v0, %0\n\t"
169 : "=m"(result)
170 :
171 : "v0", "memory");
172 // Result is 0 on r6 architectures, 1 on other architecture revisions.
173 // Fall-back to the least common denominator which is mips32 revision 1.
174 return result ? 1 : 6;
175 }
176 #endif
177
178 // Extract the information exposed by the kernel via /proc/cpuinfo.
179 class CPUInfo final {
180 public:
181 CPUInfo() : datalen_(0) {
182 // Get the size of the cpuinfo file by reading it until the end. This is
183 // required because files under /proc do not always return a valid size
184 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed.
185 static const char PATHNAME[] = "/proc/cpuinfo";
186 FILE* fp = fopen(PATHNAME, "r");
187 if (fp != NULL) {
188 for (;;) {
189 char buffer[256];
190 size_t n = fread(buffer, 1, sizeof(buffer), fp);
191 if (n == 0) {
192 break;
193 }
194 datalen_ += n;
195 }
196 fclose(fp);
197 }
198
199 // Read the contents of the cpuinfo file.
200 data_ = new char[datalen_ + 1];
201 fp = fopen(PATHNAME, "r");
202 if (fp != NULL) {
203 for (size_t offset = 0; offset < datalen_; ) {
204 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp);
205 if (n == 0) {
206 break;
207 }
208 offset += n;
209 }
210 fclose(fp);
211 }
212
213 // Zero-terminate the data.
214 data_[datalen_] = '\0';
215 }
216
217 ~CPUInfo() {
218 delete[] data_;
219 }
220
221 // Extract the content of a the first occurence of a given field in
222 // the content of the cpuinfo file and return it as a heap-allocated
223 // string that must be freed by the caller using delete[].
224 // Return NULL if not found.
225 char* ExtractField(const char* field) const {
226 DCHECK(field != NULL);
227
228 // Look for first field occurence, and ensure it starts the line.
229 size_t fieldlen = strlen(field);
230 char* p = data_;
231 for (;;) {
232 p = strstr(p, field);
233 if (p == NULL) {
234 return NULL;
235 }
236 if (p == data_ || p[-1] == '\n') {
237 break;
238 }
239 p += fieldlen;
240 }
241
242 // Skip to the first colon followed by a space.
243 p = strchr(p + fieldlen, ':');
244 if (p == NULL || !isspace(p[1])) {
245 return NULL;
246 }
247 p += 2;
248
249 // Find the end of the line.
250 char* q = strchr(p, '\n');
251 if (q == NULL) {
252 q = data_ + datalen_;
253 }
254
255 // Copy the line into a heap-allocated buffer.
256 size_t len = q - p;
257 char* result = new char[len + 1];
258 if (result != NULL) {
259 memcpy(result, p, len);
260 result[len] = '\0';
261 }
262 return result;
263 }
264
265 private:
266 char* data_;
267 size_t datalen_;
268 };
269
270 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
271
272 // Checks that a space-separated list of items contains one given 'item'.
273 static bool HasListItem(const char* list, const char* item) {
274 ssize_t item_len = strlen(item);
275 const char* p = list;
276 if (p != NULL) {
277 while (*p != '\0') {
278 // Skip whitespace.
279 while (isspace(*p)) ++p;
280
281 // Find end of current list item.
282 const char* q = p;
283 while (*q != '\0' && !isspace(*q)) ++q;
284
285 if (item_len == q - p && memcmp(p, item, item_len) == 0) {
286 return true;
287 }
288
289 // Skip to next item.
290 p = q;
291 }
292 }
293 return false;
294 }
295
296 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
297
298 #endif // V8_OS_LINUX
299
300 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
301
CPU()302 CPU::CPU()
303 : stepping_(0),
304 model_(0),
305 ext_model_(0),
306 family_(0),
307 ext_family_(0),
308 type_(0),
309 implementer_(0),
310 architecture_(0),
311 variant_(-1),
312 part_(0),
313 icache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
314 dcache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
315 has_fpu_(false),
316 has_cmov_(false),
317 has_sahf_(false),
318 has_mmx_(false),
319 has_sse_(false),
320 has_sse2_(false),
321 has_sse3_(false),
322 has_ssse3_(false),
323 has_sse41_(false),
324 has_sse42_(false),
325 is_atom_(false),
326 has_osxsave_(false),
327 has_avx_(false),
328 has_fma3_(false),
329 has_bmi1_(false),
330 has_bmi2_(false),
331 has_lzcnt_(false),
332 has_popcnt_(false),
333 has_idiva_(false),
334 has_neon_(false),
335 has_thumb2_(false),
336 has_vfp_(false),
337 has_vfp3_(false),
338 has_vfp3_d32_(false),
339 is_fp64_mode_(false),
340 has_non_stop_time_stamp_counter_(false) {
341 memcpy(vendor_, "Unknown", 8);
342 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
343 int cpu_info[4];
344
345 // __cpuid with an InfoType argument of 0 returns the number of
346 // valid Ids in CPUInfo[0] and the CPU identification string in
347 // the other three array elements. The CPU identification string is
348 // not in linear order. The code below arranges the information
349 // in a human readable form. The human readable order is CPUInfo[1] |
350 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
351 // before using memcpy to copy these three array elements to cpu_string.
352 __cpuid(cpu_info, 0);
353 unsigned num_ids = cpu_info[0];
354 std::swap(cpu_info[2], cpu_info[3]);
355 memcpy(vendor_, cpu_info + 1, 12);
356 vendor_[12] = '\0';
357
358 // Interpret CPU feature information.
359 if (num_ids > 0) {
360 __cpuid(cpu_info, 1);
361 stepping_ = cpu_info[0] & 0xf;
362 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
363 family_ = (cpu_info[0] >> 8) & 0xf;
364 type_ = (cpu_info[0] >> 12) & 0x3;
365 ext_model_ = (cpu_info[0] >> 16) & 0xf;
366 ext_family_ = (cpu_info[0] >> 20) & 0xff;
367 has_fpu_ = (cpu_info[3] & 0x00000001) != 0;
368 has_cmov_ = (cpu_info[3] & 0x00008000) != 0;
369 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
370 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
371 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
372 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
373 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
374 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
375 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
376 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
377 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0;
378 has_avx_ = (cpu_info[2] & 0x10000000) != 0;
379 has_fma3_ = (cpu_info[2] & 0x00001000) != 0;
380
381 if (family_ == 0x6) {
382 switch (model_) {
383 case 0x1c: // SLT
384 case 0x26:
385 case 0x36:
386 case 0x27:
387 case 0x35:
388 case 0x37: // SLM
389 case 0x4a:
390 case 0x4d:
391 case 0x4c: // AMT
392 case 0x6e:
393 is_atom_ = true;
394 }
395 }
396 }
397
398 // There are separate feature flags for VEX-encoded GPR instructions.
399 if (num_ids >= 7) {
400 __cpuid(cpu_info, 7);
401 has_bmi1_ = (cpu_info[1] & 0x00000008) != 0;
402 has_bmi2_ = (cpu_info[1] & 0x00000100) != 0;
403 }
404
405 // Query extended IDs.
406 __cpuid(cpu_info, 0x80000000);
407 unsigned num_ext_ids = cpu_info[0];
408
409 // Interpret extended CPU feature information.
410 if (num_ext_ids > 0x80000000) {
411 __cpuid(cpu_info, 0x80000001);
412 has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0;
413 // SAHF must be probed in long mode.
414 has_sahf_ = (cpu_info[2] & 0x00000001) != 0;
415 }
416
417 // Check if CPU has non stoppable time stamp counter.
418 const unsigned parameter_containing_non_stop_time_stamp_counter = 0x80000007;
419 if (num_ext_ids >= parameter_containing_non_stop_time_stamp_counter) {
420 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
421 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
422 }
423
424 #elif V8_HOST_ARCH_ARM
425
426 #if V8_OS_LINUX
427
428 CPUInfo cpu_info;
429
430 // Extract implementor from the "CPU implementer" field.
431 char* implementer = cpu_info.ExtractField("CPU implementer");
432 if (implementer != NULL) {
433 char* end;
434 implementer_ = strtol(implementer, &end, 0);
435 if (end == implementer) {
436 implementer_ = 0;
437 }
438 delete[] implementer;
439 }
440
441 char* variant = cpu_info.ExtractField("CPU variant");
442 if (variant != NULL) {
443 char* end;
444 variant_ = strtol(variant, &end, 0);
445 if (end == variant) {
446 variant_ = -1;
447 }
448 delete[] variant;
449 }
450
451 // Extract part number from the "CPU part" field.
452 char* part = cpu_info.ExtractField("CPU part");
453 if (part != NULL) {
454 char* end;
455 part_ = strtol(part, &end, 0);
456 if (end == part) {
457 part_ = 0;
458 }
459 delete[] part;
460 }
461
462 // Extract architecture from the "CPU Architecture" field.
463 // The list is well-known, unlike the the output of
464 // the 'Processor' field which can vary greatly.
465 // See the definition of the 'proc_arch' array in
466 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
467 // same file.
468 char* architecture = cpu_info.ExtractField("CPU architecture");
469 if (architecture != NULL) {
470 char* end;
471 architecture_ = strtol(architecture, &end, 10);
472 if (end == architecture) {
473 // Kernels older than 3.18 report "CPU architecture: AArch64" on ARMv8.
474 if (strcmp(architecture, "AArch64") == 0) {
475 architecture_ = 8;
476 } else {
477 architecture_ = 0;
478 }
479 }
480 delete[] architecture;
481
482 // Unfortunately, it seems that certain ARMv6-based CPUs
483 // report an incorrect architecture number of 7!
484 //
485 // See http://code.google.com/p/android/issues/detail?id=10812
486 //
487 // We try to correct this by looking at the 'elf_platform'
488 // field reported by the 'Processor' field, which is of the
489 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
490 // an ARMv6-one. For example, the Raspberry Pi is one popular
491 // ARMv6 device that reports architecture 7.
492 if (architecture_ == 7) {
493 char* processor = cpu_info.ExtractField("Processor");
494 if (HasListItem(processor, "(v6l)")) {
495 architecture_ = 6;
496 }
497 delete[] processor;
498 }
499
500 // elf_platform moved to the model name field in Linux v3.8.
501 if (architecture_ == 7) {
502 char* processor = cpu_info.ExtractField("model name");
503 if (HasListItem(processor, "(v6l)")) {
504 architecture_ = 6;
505 }
506 delete[] processor;
507 }
508 }
509
510 // Try to extract the list of CPU features from ELF hwcaps.
511 uint32_t hwcaps = ReadELFHWCaps();
512 if (hwcaps != 0) {
513 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0;
514 has_neon_ = (hwcaps & HWCAP_NEON) != 0;
515 has_vfp_ = (hwcaps & HWCAP_VFP) != 0;
516 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0;
517 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 ||
518 (hwcaps & HWCAP_VFPD32) != 0));
519 } else {
520 // Try to fallback to "Features" CPUInfo field.
521 char* features = cpu_info.ExtractField("Features");
522 has_idiva_ = HasListItem(features, "idiva");
523 has_neon_ = HasListItem(features, "neon");
524 has_thumb2_ = HasListItem(features, "thumb2");
525 has_vfp_ = HasListItem(features, "vfp");
526 if (HasListItem(features, "vfpv3d16")) {
527 has_vfp3_ = true;
528 } else if (HasListItem(features, "vfpv3")) {
529 has_vfp3_ = true;
530 has_vfp3_d32_ = true;
531 }
532 delete[] features;
533 }
534
535 // Some old kernels will report vfp not vfpv3. Here we make an attempt
536 // to detect vfpv3 by checking for vfp *and* neon, since neon is only
537 // available on architectures with vfpv3. Checking neon on its own is
538 // not enough as it is possible to have neon without vfp.
539 if (has_vfp_ && has_neon_) {
540 has_vfp3_ = true;
541 }
542
543 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6.
544 if (architecture_ < 7 && has_vfp3_) {
545 architecture_ = 7;
546 }
547
548 // ARMv7 implies Thumb2.
549 if (architecture_ >= 7) {
550 has_thumb2_ = true;
551 }
552
553 // The earliest architecture with Thumb2 is ARMv6T2.
554 if (has_thumb2_ && architecture_ < 6) {
555 architecture_ = 6;
556 }
557
558 // We don't support any FPUs other than VFP.
559 has_fpu_ = has_vfp_;
560
561 #elif V8_OS_QNX
562
563 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags;
564 if (cpu_flags & ARM_CPU_FLAG_V7) {
565 architecture_ = 7;
566 has_thumb2_ = true;
567 } else if (cpu_flags & ARM_CPU_FLAG_V6) {
568 architecture_ = 6;
569 // QNX doesn't say if Thumb2 is available.
570 // Assume false for the architectures older than ARMv7.
571 }
572 DCHECK(architecture_ >= 6);
573 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0;
574 has_vfp_ = has_fpu_;
575 if (cpu_flags & ARM_CPU_FLAG_NEON) {
576 has_neon_ = true;
577 has_vfp3_ = has_vfp_;
578 #ifdef ARM_CPU_FLAG_VFP_D32
579 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0;
580 #endif
581 }
582 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0;
583
584 #endif // V8_OS_LINUX
585
586 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
587
588 // Simple detection of FPU at runtime for Linux.
589 // It is based on /proc/cpuinfo, which reveals hardware configuration
590 // to user-space applications. According to MIPS (early 2010), no similar
591 // facility is universally available on the MIPS architectures,
592 // so it's up to individual OSes to provide such.
593 CPUInfo cpu_info;
594 char* cpu_model = cpu_info.ExtractField("cpu model");
595 has_fpu_ = HasListItem(cpu_model, "FPU");
596 delete[] cpu_model;
597 #ifdef V8_HOST_ARCH_MIPS
598 is_fp64_mode_ = __detect_fp64_mode();
599 architecture_ = __detect_mips_arch_revision();
600 #endif
601
602 #elif V8_HOST_ARCH_ARM64
603
604 CPUInfo cpu_info;
605
606 // Extract implementor from the "CPU implementer" field.
607 char* implementer = cpu_info.ExtractField("CPU implementer");
608 if (implementer != NULL) {
609 char* end;
610 implementer_ = static_cast<int>(strtol(implementer, &end, 0));
611 if (end == implementer) {
612 implementer_ = 0;
613 }
614 delete[] implementer;
615 }
616
617 char* variant = cpu_info.ExtractField("CPU variant");
618 if (variant != NULL) {
619 char* end;
620 variant_ = static_cast<int>(strtol(variant, &end, 0));
621 if (end == variant) {
622 variant_ = -1;
623 }
624 delete[] variant;
625 }
626
627 // Extract part number from the "CPU part" field.
628 char* part = cpu_info.ExtractField("CPU part");
629 if (part != NULL) {
630 char* end;
631 part_ = static_cast<int>(strtol(part, &end, 0));
632 if (end == part) {
633 part_ = 0;
634 }
635 delete[] part;
636 }
637
638 #elif V8_HOST_ARCH_PPC
639
640 #ifndef USE_SIMULATOR
641 #if V8_OS_LINUX
642 // Read processor info from /proc/self/auxv.
643 char* auxv_cpu_type = NULL;
644 FILE* fp = fopen("/proc/self/auxv", "r");
645 if (fp != NULL) {
646 #if V8_TARGET_ARCH_PPC64
647 Elf64_auxv_t entry;
648 #else
649 Elf32_auxv_t entry;
650 #endif
651 for (;;) {
652 size_t n = fread(&entry, sizeof(entry), 1, fp);
653 if (n == 0 || entry.a_type == AT_NULL) {
654 break;
655 }
656 switch (entry.a_type) {
657 case AT_PLATFORM:
658 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val);
659 break;
660 case AT_ICACHEBSIZE:
661 icache_line_size_ = entry.a_un.a_val;
662 break;
663 case AT_DCACHEBSIZE:
664 dcache_line_size_ = entry.a_un.a_val;
665 break;
666 }
667 }
668 fclose(fp);
669 }
670
671 part_ = -1;
672 if (auxv_cpu_type) {
673 if (strcmp(auxv_cpu_type, "power8") == 0) {
674 part_ = PPC_POWER8;
675 } else if (strcmp(auxv_cpu_type, "power7") == 0) {
676 part_ = PPC_POWER7;
677 } else if (strcmp(auxv_cpu_type, "power6") == 0) {
678 part_ = PPC_POWER6;
679 } else if (strcmp(auxv_cpu_type, "power5") == 0) {
680 part_ = PPC_POWER5;
681 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) {
682 part_ = PPC_G5;
683 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) {
684 part_ = PPC_G4;
685 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) {
686 part_ = PPC_PA6T;
687 }
688 }
689
690 #elif V8_OS_AIX
691 switch (_system_configuration.implementation) {
692 case POWER_8:
693 part_ = PPC_POWER8;
694 break;
695 case POWER_7:
696 part_ = PPC_POWER7;
697 break;
698 case POWER_6:
699 part_ = PPC_POWER6;
700 break;
701 case POWER_5:
702 part_ = PPC_POWER5;
703 break;
704 }
705 #endif // V8_OS_AIX
706 #endif // !USE_SIMULATOR
707 #endif // V8_HOST_ARCH_PPC
708 }
709
710 } // namespace base
711 } // namespace v8
712