1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #if V8_TARGET_ARCH_ARM64
6
7 #include "src/codegen.h"
8 #include "src/ic/ic.h"
9 #include "src/ic/stub-cache.h"
10 #include "src/interface-descriptors.h"
11
12 namespace v8 {
13 namespace internal {
14
15
16 #define __ ACCESS_MASM(masm)
17
18
19 // Probe primary or secondary table.
20 // If the entry is found in the cache, the generated code jump to the first
21 // instruction of the stub in the cache.
22 // If there is a miss the code fall trough.
23 //
24 // 'receiver', 'name' and 'offset' registers are preserved on miss.
ProbeTable(StubCache * stub_cache,MacroAssembler * masm,StubCache::Table table,Register receiver,Register name,Register offset,Register scratch,Register scratch2,Register scratch3)25 static void ProbeTable(StubCache* stub_cache, MacroAssembler* masm,
26 StubCache::Table table, Register receiver, Register name,
27 // The offset is scaled by 4, based on
28 // kCacheIndexShift, which is two bits
29 Register offset, Register scratch, Register scratch2,
30 Register scratch3) {
31 // Some code below relies on the fact that the Entry struct contains
32 // 3 pointers (name, code, map).
33 STATIC_ASSERT(sizeof(StubCache::Entry) == (3 * kPointerSize));
34
35 ExternalReference key_offset(stub_cache->key_reference(table));
36 ExternalReference value_offset(stub_cache->value_reference(table));
37 ExternalReference map_offset(stub_cache->map_reference(table));
38
39 uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address());
40 uintptr_t value_off_addr =
41 reinterpret_cast<uintptr_t>(value_offset.address());
42 uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address());
43
44 Label miss;
45
46 DCHECK(!AreAliased(name, offset, scratch, scratch2, scratch3));
47
48 // Multiply by 3 because there are 3 fields per entry.
49 __ Add(scratch3, offset, Operand(offset, LSL, 1));
50
51 // Calculate the base address of the entry.
52 __ Mov(scratch, key_offset);
53 __ Add(
54 scratch, scratch,
55 Operand(scratch3, LSL, kPointerSizeLog2 - StubCache::kCacheIndexShift));
56
57 // Check that the key in the entry matches the name.
58 __ Ldr(scratch2, MemOperand(scratch));
59 __ Cmp(name, scratch2);
60 __ B(ne, &miss);
61
62 // Check the map matches.
63 __ Ldr(scratch2, MemOperand(scratch, map_off_addr - key_off_addr));
64 __ Ldr(scratch3, FieldMemOperand(receiver, HeapObject::kMapOffset));
65 __ Cmp(scratch2, scratch3);
66 __ B(ne, &miss);
67
68 // Get the code entry from the cache.
69 __ Ldr(scratch, MemOperand(scratch, value_off_addr - key_off_addr));
70
71 #ifdef DEBUG
72 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) {
73 __ B(&miss);
74 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
75 __ B(&miss);
76 }
77 #endif
78
79 // Jump to the first instruction in the code stub.
80 __ Add(scratch, scratch, Code::kHeaderSize - kHeapObjectTag);
81 __ Br(scratch);
82
83 // Miss: fall through.
84 __ Bind(&miss);
85 }
86
GenerateProbe(MacroAssembler * masm,Register receiver,Register name,Register scratch,Register extra,Register extra2,Register extra3)87 void StubCache::GenerateProbe(MacroAssembler* masm, Register receiver,
88 Register name, Register scratch, Register extra,
89 Register extra2, Register extra3) {
90 Label miss;
91
92 // Make sure that there are no register conflicts.
93 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3));
94
95 // Make sure extra and extra2 registers are valid.
96 DCHECK(!extra.is(no_reg));
97 DCHECK(!extra2.is(no_reg));
98 DCHECK(!extra3.is(no_reg));
99
100 #ifdef DEBUG
101 // If vector-based ics are in use, ensure that scratch, extra, extra2 and
102 // extra3 don't conflict with the vector and slot registers, which need
103 // to be preserved for a handler call or miss.
104 if (IC::ICUseVector(ic_kind_)) {
105 Register vector, slot;
106 if (ic_kind_ == Code::STORE_IC || ic_kind_ == Code::KEYED_STORE_IC) {
107 vector = StoreWithVectorDescriptor::VectorRegister();
108 slot = StoreWithVectorDescriptor::SlotRegister();
109 } else {
110 DCHECK(ic_kind_ == Code::LOAD_IC || ic_kind_ == Code::KEYED_LOAD_IC);
111 vector = LoadWithVectorDescriptor::VectorRegister();
112 slot = LoadWithVectorDescriptor::SlotRegister();
113 }
114 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
115 }
116 #endif
117
118 Counters* counters = masm->isolate()->counters();
119 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2,
120 extra3);
121
122 // Check that the receiver isn't a smi.
123 __ JumpIfSmi(receiver, &miss);
124
125 // Compute the hash for primary table.
126 __ Ldr(scratch.W(), FieldMemOperand(name, Name::kHashFieldOffset));
127 __ Ldr(extra, FieldMemOperand(receiver, HeapObject::kMapOffset));
128 __ Add(scratch, scratch, extra);
129 __ Eor(scratch, scratch, kPrimaryMagic);
130 __ And(scratch, scratch,
131 Operand((kPrimaryTableSize - 1) << kCacheIndexShift));
132
133 // Probe the primary table.
134 ProbeTable(this, masm, kPrimary, receiver, name, scratch, extra, extra2,
135 extra3);
136
137 // Primary miss: Compute hash for secondary table.
138 __ Sub(scratch, scratch, Operand(name));
139 __ Add(scratch, scratch, Operand(kSecondaryMagic));
140 __ And(scratch, scratch,
141 Operand((kSecondaryTableSize - 1) << kCacheIndexShift));
142
143 // Probe the secondary table.
144 ProbeTable(this, masm, kSecondary, receiver, name, scratch, extra, extra2,
145 extra3);
146
147 // Cache miss: Fall-through and let caller handle the miss by
148 // entering the runtime system.
149 __ Bind(&miss);
150 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2,
151 extra3);
152 }
153 } // namespace internal
154 } // namespace v8
155
156 #endif // V8_TARGET_ARCH_ARM64
157