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+path:test +path:traces
(Results
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/external/vixl/test/aarch32/traces/
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assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-eors.h
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assembler-cond-rd-rn-rm-t32-uadd16.h
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assembler-cond-rd-rn-rm-t32-shsax.h
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simulator-cond-rd-rn-operand-rm-a32-asr.h
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assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32-rsb.h
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assembler-cond-rd-rn-operand-rm-t32-all-low-rd-is-rn-in-it-block-lsr.h
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assembler-cond-rd-rn-operand-rm-t32-sbc.h
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assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32-and.h
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simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32-subs.h
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assembler-cond-rd-rn-operand-const-a32-sbc.h
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simulator-cond-rd-operand-rn-shift-amount-1to31-t32-cmp.h
/external/vixl/test/aarch64/traces/
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sim-umull-2d-2s-s-trace-aarch64.h
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sim-uabal-4s-trace-aarch64.h
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sim-sqrshrn-4h-2opimm-trace-aarch64.h
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sim-sqshrn2-16b-2opimm-trace-aarch64.h
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sim-uabal2-4s-trace-aarch64.h
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sim-usqadd-8h-trace-aarch64.h
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sim-fmul-4s-trace-aarch64.h
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sim-saddl2-4s-trace-aarch64.h
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sim-sqdmlsl2-2d-trace-aarch64.h
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sim-uqadd-d-trace-aarch64.h
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sim-smaxv-s-4s-trace-aarch64.h
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sim-cls-4s-trace-aarch64.h
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sim-usqadd-s-trace-aarch64.h
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sim-fcvtpu-2s-trace-aarch64.h
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