| /art/compiler/utils/arm/ |
| D | assembler_thumb2.h | 73 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
76 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
79 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
82 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
85 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
88 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
91 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
94 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
96 void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
98 void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
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| D | assembler_arm.h | 410 Condition cond = AL, SetCc set_cc = kCcDontCare) = 0;
412 virtual void ands(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
417 Condition cond = AL, SetCc set_cc = kCcDontCare) = 0;
419 virtual void eors(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
424 Condition cond = AL, SetCc set_cc = kCcDontCare) = 0;
426 virtual void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
431 Condition cond = AL, SetCc set_cc = kCcDontCare) = 0;
433 virtual void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
438 Condition cond = AL, SetCc set_cc = kCcDontCare) = 0;
440 virtual void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
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| D | assembler_thumb2.cc | 325 inline int16_t Thumb2Assembler::BEncoding16(int32_t offset, Condition cond) { in BEncoding16()
338 inline int32_t Thumb2Assembler::BEncoding32(int32_t offset, Condition cond) { in BEncoding32()
361 inline int16_t Thumb2Assembler::CbxzEncoding16(Register rn, int32_t offset, Condition cond) { in CbxzEncoding16()
543 Condition cond, SetCc set_cc) { in and_()
549 Condition cond, SetCc set_cc) { in eor()
555 Condition cond, SetCc set_cc) { in sub()
561 Condition cond, SetCc set_cc) { in rsb()
567 Condition cond, SetCc set_cc) { in add()
573 Condition cond, SetCc set_cc) { in adc()
579 Condition cond, SetCc set_cc) { in sbc()
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| D | constants_arm.h | 103 enum Condition { // private marker to avoid generate-operator-out.py from processing. enum
128 std::ostream& operator<<(std::ostream& os, const Condition& rhs);
273 Condition ConditionField() const { in ConditionField()
274 return static_cast<Condition>(Bits(kConditionShift, kConditionBits)); in ConditionField()
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| D | assembler_arm_vixl.h | 137 void B(vixl32::Condition cond, vixl32::Label* label, bool is_far_target = true);
226 vixl32::Condition cond = vixl32::al);
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| D | assembler_arm_vixl.cc | 427 vixl32::Condition cond) { in AddConstantInIt()
476 void ArmVIXLMacroAssembler::B(vixl32::Condition cond, vixl32::Label* label, bool is_far_target) { in B()
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| D | assembler_arm.cc | 69 std::ostream& operator<<(std::ostream& os, const Condition& rhs) { in operator <<()
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| D | jni_macro_assembler_arm.cc | 611 arm::Condition arm_cond; in Jump()
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.h | 213 vixl::aarch64::Condition cond = vixl::aarch64::al);
224 vixl::aarch64::Condition cond = vixl::aarch64::al);
228 vixl::aarch64::Condition cond = vixl::aarch64::al);
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| D | jni_macro_assembler_arm64.cc | 73 void Arm64JNIMacroAssembler::AddConstant(XRegister rd, int32_t value, Condition cond) { in AddConstant()
80 Condition cond) { in AddConstant()
196 void Arm64JNIMacroAssembler::LoadImmediate(XRegister dest, int32_t value, Condition cond) { in LoadImmediate()
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| /art/compiler/utils/x86/ |
| D | constants_x86.h | 78 enum Condition { enum
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| D | assembler_x86.h | 369 void cmovl(Condition condition, Register dst, Register src);
370 void cmovl(Condition condition, Register dst, const Address& src);
372 void setb(Condition condition, Register dst);
665 void j(Condition condition, Label* label);
666 void j(Condition condition, NearLabel* label);
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| D | assembler_x86.cc | 321 void X86Assembler::cmovl(Condition condition, Register dst, Register src) { in cmovl()
329 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) { in cmovl()
337 void X86Assembler::setb(Condition condition, Register dst) { in setb()
2172 void X86Assembler::j(Condition condition, Label* label) { in j()
2195 void X86Assembler::j(Condition condition, NearLabel* label) { in j()
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| D | jni_macro_assembler_x86.cc | 540 art::x86::Condition x86_cond; in Jump()
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| /art/compiler/utils/x86_64/ |
| D | constants_x86_64.h | 87 enum Condition { enum
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| D | assembler_x86_64.h | 370 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
371 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
372 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
708 void j(Condition condition, Label* label);
709 void j(Condition condition, NearLabel* label);
725 void setcc(Condition condition, CpuRegister dst);
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| D | assembler_x86_64.cc | 213 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov()
217 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov()
226 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov()
2672 void X86_64Assembler::j(Condition condition, Label* label) { in j()
2695 void X86_64Assembler::j(Condition condition, NearLabel* label) { in j()
2839 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc()
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| /art/compiler/optimizing/ |
| D | code_generator_arm.h | 387 Condition cond = AL);
393 Condition cond = AL);
398 Condition cond = AL);
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| D | intrinsics_x86.cc | 541 __ j(Condition::kParityEven, &nan); in GenMinMaxFP()
543 __ j(is_min ? Condition::kAbove : Condition::kBelow, &op2_label); in GenMinMaxFP()
544 __ j(is_min ? Condition::kBelow : Condition::kAbove, &done); in GenMinMaxFP()
702 Condition cond = is_min ? Condition::kGreaterEqual : Condition::kLess; in GenMinMax()
716 Condition cond = is_min ? Condition::kGreater : Condition::kLess; in GenMinMax()
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| D | code_generator_arm_vixl.cc | 1374 inline vixl32::Condition ARMCondition(IfCondition cond) { in ARMCondition()
1392 inline vixl32::Condition ARMUnsignedCondition(IfCondition cond) { in ARMUnsignedCondition()
1411 inline vixl32::Condition ARMFPCondition(IfCondition cond, bool gt_bias) { in ARMFPCondition()
1696 static std::pair<vixl32::Condition, vixl32::Condition> GenerateLongTestConstant( in GenerateLongTestConstant()
1710 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateLongTestConstant()
1778 static std::pair<vixl32::Condition, vixl32::Condition> GenerateLongTest( in GenerateLongTest()
1792 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateLongTest()
1849 static std::pair<vixl32::Condition, vixl32::Condition> GenerateTest(HCondition* condition, in GenerateTest()
1855 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateTest()
2483 vixl32::Condition final_condition = ARMUnsignedCondition(if_cond); // unsigned on lower part in GenerateLongComparesAndJumps()
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| D | code_generator_arm.cc | 1330 inline Condition ARMCondition(IfCondition cond) { in ARMCondition()
1348 inline Condition ARMUnsignedCondition(IfCondition cond) { in ARMUnsignedCondition()
1367 inline Condition ARMFPCondition(IfCondition cond, bool gt_bias) { in ARMFPCondition()
1610 static std::pair<Condition, Condition> GenerateLongTestConstant(HCondition* condition, in GenerateLongTestConstant()
1623 std::pair<Condition, Condition> ret; in GenerateLongTestConstant()
1681 static std::pair<Condition, Condition> GenerateLongTest(HCondition* condition, in GenerateLongTest()
1694 std::pair<Condition, Condition> ret; in GenerateLongTest()
1747 static std::pair<Condition, Condition> GenerateTest(HCondition* condition, in GenerateTest()
1754 std::pair<Condition, Condition> ret; in GenerateTest()
2448 Condition final_condition = ARMUnsignedCondition(if_cond); // unsigned on lower part in GenerateLongComparesAndJumps()
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| D | code_generator_arm_vixl.h | 476 vixl::aarch32::Condition cond = vixl::aarch32::al);
481 vixl::aarch32::Condition cond = vixl::aarch32::al);
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| D | intrinsics_x86_64.cc | 382 __ j(Condition::kParityEven, &nan); in GenMinMaxFP()
384 __ j(is_min ? Condition::kAbove : Condition::kBelow, &op2_label); in GenMinMaxFP()
385 __ j(is_min ? Condition::kBelow : Condition::kAbove, &done); in GenMinMaxFP()
500 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, is_long); in GenMinMax()
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| D | nodes.h | 1284 M(Above, Condition) \
1285 M(AboveOrEqual, Condition) \
1291 M(Below, Condition) \
1292 M(BelowOrEqual, Condition) \
1307 M(Equal, Condition) \
1311 M(GreaterThan, Condition) \
1312 M(GreaterThanOrEqual, Condition) \
1323 M(LessThan, Condition) \
1324 M(LessThanOrEqual, Condition) \
1337 M(NotEqual, Condition) \
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| D | intrinsics_arm.cc | 473 __ it((is_min) ? Condition::LT : Condition::GT, kItElse); in GenMinMax()
474 __ mov(out, ShifterOperand(op1), is_min ? Condition::LT : Condition::GT); in GenMinMax()
475 __ mov(out, ShifterOperand(op2), is_min ? Condition::GE : Condition::LE); in GenMinMax()
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