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Searched refs:EmitR (Results 1 – 4 of 4) sorted by relevance

/art/compiler/utils/mips64/
Dassembler_mips64.cc99 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR() function in art::mips64::Mips64Assembler
304 EmitR(0, rs, rt, rd, 0, 0x21); in Addu()
312 EmitR(0, rs, rt, rd, 0, 0x2d); in Daddu()
320 EmitR(0, rs, rt, rd, 0, 0x23); in Subu()
324 EmitR(0, rs, rt, rd, 0, 0x2f); in Dsubu()
328 EmitR(0, rs, rt, rd, 2, 0x18); in MulR6()
332 EmitR(0, rs, rt, rd, 3, 0x18); in MuhR6()
336 EmitR(0, rs, rt, rd, 2, 0x1a); in DivR6()
340 EmitR(0, rs, rt, rd, 3, 0x1a); in ModR6()
344 EmitR(0, rs, rt, rd, 2, 0x1b); in DivuR6()
[all …]
Dassembler_mips64.h1446 void EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, int shamt, int funct);
/art/compiler/utils/mips/
Dassembler_mips.cc331 uint32_t MipsAssembler::EmitR(int opcode, in EmitR() function in art::mips::MipsAssembler
408 DsFsmInstrRrr(EmitR(0, rs, rt, rd, 0, 0x21), rd, rs, rt); in Addu()
416 DsFsmInstrRrr(EmitR(0, rs, rt, rd, 0, 0x23), rd, rs, rt); in Subu()
421 DsFsmInstrRrr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18), ZERO, rs, rt); in MultR2()
426 DsFsmInstrRrr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19), ZERO, rs, rt); in MultuR2()
431 DsFsmInstrRrr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a), ZERO, rs, rt); in DivR2()
436 DsFsmInstrRrr(EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b), ZERO, rs, rt); in DivuR2()
441 DsFsmInstrRrr(EmitR(0x1c, rs, rt, rd, 0, 2), rd, rs, rt); in MulR2()
470 DsFsmInstrRrr(EmitR(0, rs, rt, rd, 2, 0x18), rd, rs, rt); in MulR6()
475 DsFsmInstrRrr(EmitR(0, rs, rt, rd, 3, 0x18), rd, rs, rt); in MuhR6()
[all …]
Dassembler_mips.h1277 uint32_t EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct);