Searched refs:F1 (Results 1 – 9 of 9) sorted by relevance
72 F1 = 1, enumerator
56 (1 << art::mips::F0) | (1 << art::mips::F1) | (1 << art::mips::F2) | (1 << art::mips::F3) |
73 F1 = 1, enumerator
86 fprs_[F1] = nullptr; in SmashCallerSaves()
60 (1 << art::mips64::F0) | (1 << art::mips64::F1) | (1 << art::mips64::F2) |
121 reg = Mips64ManagedRegister::FromFpuRegister(F1); in TEST()128 EXPECT_EQ(F1, reg.AsFpuRegister()); in TEST()130 EXPECT_TRUE(reg.Equals(Mips64ManagedRegister::FromFpuRegister(F1))); in TEST()242 EXPECT_FALSE(reg_F0.Equals(Mips64ManagedRegister::FromFpuRegister(F1))); in TEST()252 EXPECT_FALSE(reg_F31.Equals(Mips64ManagedRegister::FromFpuRegister(F1))); in TEST()
157 fp_registers_.push_back(new mips64::FpuRegister(mips64::F1)); in SetUpHelpers()
154 fp_registers_.push_back(new mips::FRegister(mips::F1)); in SetUpHelpers()
124 fp_registers_.push_back(new mips::FRegister(mips::F1)); in SetUpHelpers()