| /art/compiler/optimizing/ |
| D | dex_cache_array_fixups_mips.cc | 96 if (mips_codegen->GetInstructionSetFeatures().IsR6()) { in Run()
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| D | pc_relative_fixups_mips.cc | 121 if (mips_codegen->GetInstructionSetFeatures().IsR6()) { in Run()
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| D | code_generator_mips.cc | 256 bool isR6 = mips_codegen->GetInstructionSetFeatures().IsR6(); in EmitNativeCode()
312 bool isR6 = mips_codegen->GetInstructionSetFeatures().IsR6(); in EmitNativeCode()
726 bool is_r6 = mips_codegen->GetInstructionSetFeatures().IsR6(); in EmitNativeCode()
1668 if (GetInstructionSetFeatures().IsR6()) { in EmitPcRelativeAddressPlaceholderHigh()
2220 bool has_ins_rotr = codegen_->GetInstructionSetFeatures().IsMipsIsaRevGreaterThanEqual2(); in HandleShift()
3297 bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); in VisitCompare()
3568 bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); in GenerateDivRemWithAnyConstant()
3626 bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); in GenerateDivRemIntegral()
4112 bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); in GenerateIntCompareAndBranch()
4466 bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); in GenerateFpCompare()
[all …]
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| D | intrinsics_arm_vixl.cc | 252 features_(codegen->GetInstructionSetFeatures()) {} in IntrinsicLocationsBuilderARMVIXL()
799 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions()); in VisitMathRint()
816 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions()); in VisitMathRoundFloat()
1021 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) { in GenUnsafeGet()
1181 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) { in GenUnsafePut()
3074 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions()); in VisitMathCeil()
3086 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions()); in VisitMathFloor()
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| D | code_generator_x86.h | 466 const X86InstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | code_generator_x86_64.h | 434 const X86_64InstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | code_generator_mips64.h | 454 const Mips64InstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | optimizing_compiler.cc | 960 *compiler_driver->GetInstructionSetFeatures(), in TryCompile()
1269 GetCompilerDriver()->GetInstructionSetFeatures(), in JitCompile()
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| D | code_generator_arm.h | 431 const ArmInstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | code_generator_mips.h | 494 const MipsInstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | code_generator_arm64.h | 467 const Arm64InstructionSetFeatures& GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| D | code_generator_arm_vixl.h | 517 const ArmInstructionSetFeatures& GetInstructionSetFeatures() const { return isa_features_; } in GetInstructionSetFeatures() function
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| D | intrinsics_mips.cc | 47 return codegen_->GetInstructionSetFeatures().IsMipsIsaRevGreaterThanEqual2(); in IsR2OrNewer()
51 return codegen_->GetInstructionSetFeatures().IsR6(); in IsR6()
55 return codegen_->GetInstructionSetFeatures().Is32BitFloatingPoint(); in Is32BitFPU()
1908 bool isR6 = codegen->GetInstructionSetFeatures().IsR6(); in GenCas()
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| D | code_generator_arm.cc | 4159 !codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4181 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4227 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4285 && codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
4307 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
4366 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
5107 && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldSet()
5143 bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldSet()
5263 && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldGet()
5387 bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldGet()
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| D | code_generator_arm_vixl.cc | 4153 !codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4175 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4219 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitDiv()
4266 && codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
4288 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
4347 } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) { in VisitRem()
5109 && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldSet()
5145 bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldSet()
5272 && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldGet()
5390 bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd(); in HandleFieldGet()
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| D | intrinsics_x86_64.cc | 584 if (codegen->GetInstructionSetFeatures().HasSSE4_1()) { in CreateSSE41FPToFPLocations()
641 if (codegen->GetInstructionSetFeatures().HasSSE4_1()) { in CreateSSE41FPToIntLocations()
2627 if (!codegen->GetInstructionSetFeatures().HasPopCnt()) { in CreateBitCountLocations()
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| D | intrinsics_arm.cc | 180 features_(codegen->GetInstructionSetFeatures()) {} in IntrinsicLocationsBuilderARM()
687 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) { in GenUnsafeGet()
844 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) { in GenUnsafePut()
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| D | intrinsics_x86.cc | 813 if (codegen->GetInstructionSetFeatures().HasSSE4_1()) { in CreateSSE41FPToFPLocations()
868 if (codegen_->GetInstructionSetFeatures().HasSSE4_1()) { in VisitMathRoundFloat()
2554 if (!codegen->GetInstructionSetFeatures().HasPopCnt()) { in CreateBitCountLocations()
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| D | loop_optimization.cc | 913 const InstructionSetFeatures* features = compiler_driver_->GetInstructionSetFeatures(); in TrySetVectorType()
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| D | code_generator_arm64.cc | 2677 codegen_->GetInstructionSetFeatures().NeedFixCortexA53_835769()) { in VisitMultiplyAccumulate()
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| /art/compiler/jit/ |
| D | jit_compiler.cc | 76 kRuntimeISA, jit_compiler->GetCompilerDriver()->GetInstructionSetFeatures(), types_array); in jit_types_loaded()
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| /art/compiler/ |
| D | image_test.cc | 238 driver->GetInstructionSetFeatures(), in Compile()
267 driver->GetInstructionSetFeatures(), in Compile()
300 driver->GetInstructionSetFeatures()); in Compile()
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| D | oat_test.cc | 187 compiler_driver_->GetInstructionSetFeatures(), in DoWriteElf()
197 compiler_driver_->GetInstructionSetFeatures(), in DoWriteElf()
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| /art/compiler/driver/ |
| D | compiler_driver.h | 144 const InstructionSetFeatures* GetInstructionSetFeatures() const { in GetInstructionSetFeatures() function
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| /art/compiler/jni/quick/ |
| D | jni_compiler.cc | 131 const InstructionSetFeatures* instruction_set_features = driver->GetInstructionSetFeatures(); in ArtJniCompileMethodInternal()
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