| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 1308 TEST_F(AssemblerMIPSTest, LoadSFromOffset) { in TEST_F() argument
1309 __ LoadSFromOffset(mips::F2, mips::A0, -0x8000); in TEST_F() local
1310 __ LoadSFromOffset(mips::F2, mips::A0, +0); in TEST_F() local
1311 __ LoadSFromOffset(mips::F2, mips::A0, +0x7FF8); in TEST_F() local
1312 __ LoadSFromOffset(mips::F2, mips::A0, +0x7FFB); in TEST_F() local
1313 __ LoadSFromOffset(mips::F2, mips::A0, +0x7FFC); in TEST_F() local
1314 __ LoadSFromOffset(mips::F2, mips::A0, +0x7FFF); in TEST_F() local
1315 __ LoadSFromOffset(mips::F2, mips::A0, -0xFFF0); in TEST_F() local
1316 __ LoadSFromOffset(mips::F2, mips::A0, -0x8008); in TEST_F() local
1317 __ LoadSFromOffset(mips::F2, mips::A0, -0x8001); in TEST_F() local
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| D | assembler_mips.h | 616 void LoadSFromOffset(FRegister reg,
719 void LoadSFromOffset(FRegister reg, Register base, int32_t offset);
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| D | assembler_mips.cc | 3255 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { in LoadSFromOffset() function in art::mips::MipsAssembler
3256 LoadSFromOffset<>(reg, base, offset); in LoadSFromOffset()
3276 LoadSFromOffset(dst.AsFRegister(), src_register, src_offset); in EmitLoad()
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.h | 202 void LoadSFromOffset(vixl32::SRegister reg, vixl32::Register base, int32_t offset);
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| D | assembler_arm_vixl.cc | 347 void ArmVIXLAssembler::LoadSFromOffset(vixl32::SRegister reg, in LoadSFromOffset() function in art::arm::ArmVIXLAssembler
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| D | jni_macro_assembler_arm.cc | 302 assembler->LoadSFromOffset(dst.AsSRegister(), src_register, src_offset); in EmitLoad()
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| D | assembler_arm.h | 737 virtual void LoadSFromOffset(SRegister reg,
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| D | assembler_thumb2.h | 339 void LoadSFromOffset(SRegister reg,
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| D | assembler_thumb2.cc | 3856 void Thumb2Assembler::LoadSFromOffset(SRegister reg, in LoadSFromOffset() function in art::arm::Thumb2Assembler
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.h | 220 void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset);
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| D | jni_macro_assembler_arm64.cc | 246 void Arm64JNIMacroAssembler::LoadSFromOffset(SRegister dest, XRegister base, int32_t offset) { in LoadSFromOffset() function in art::arm64::Arm64JNIMacroAssembler
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| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 1936 __ LoadSFromOffset(static_cast<SRegister>(reg_id), SP, stack_index); in RestoreFloatingPointRegister() local
2262 __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex()); in Move32() local
5448 __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), base, offset); in HandleFieldGet() local
5929 __ LoadSFromOffset(out, obj, offset); in VisitArrayGet() local
5932 __ LoadSFromOffset(out, IP, data_offset); in VisitArrayGet() local
6435 __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex()); in EmitMove() local
6622 __ LoadSFromOffset(reg, SP, mem); in EmitSwap() local
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| D | code_generator_arm_vixl.cc | 2356 GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex()); in Move32()
5449 GetAssembler()->LoadSFromOffset(SRegisterFrom(out), base, offset); in HandleFieldGet()
5949 GetAssembler()->LoadSFromOffset(out, obj, offset); in VisitArrayGet()
5954 GetAssembler()->LoadSFromOffset(out, temp, data_offset); in VisitArrayGet()
6480 GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex()); in EmitMove()
6680 GetAssembler()->LoadSFromOffset(reg, sp, mem); in EmitSwap()
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| D | code_generator_mips.cc | 1189 __ LoadSFromOffset(reg, SP, offset); in EmitSwap() local
1412 __ LoadSFromOffset(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex()); in Move32() local
2651 __ LoadSFromOffset(out, obj, offset, null_checker); in VisitArrayGet() local
2654 __ LoadSFromOffset(out, TMP, data_offset, null_checker); in VisitArrayGet() local
5919 __ LoadSFromOffset(dst, obj, offset, null_checker); in HandleFieldGet() local
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