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Searched refs:R4 (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/
Dassembler_thumb_test.cc441 __ movs(R3, ShifterOperand(R4, LSL, 4)); in TEST_F()
442 __ movs(R3, ShifterOperand(R4, LSR, 5)); in TEST_F()
443 __ movs(R3, ShifterOperand(R4, ASR, 6)); in TEST_F()
446 __ movs(R3, ShifterOperand(R4, ROR, 7)); in TEST_F()
449 __ movs(R3, ShifterOperand(R4, RRX)); in TEST_F()
452 __ mov(R3, ShifterOperand(R4, LSL, 4), AL, kCcKeep); in TEST_F()
453 __ mov(R3, ShifterOperand(R4, LSR, 5), AL, kCcKeep); in TEST_F()
454 __ mov(R3, ShifterOperand(R4, ASR, 6), AL, kCcKeep); in TEST_F()
455 __ mov(R3, ShifterOperand(R4, ROR, 7), AL, kCcKeep); in TEST_F()
456 __ mov(R3, ShifterOperand(R4, RRX), AL, kCcKeep); in TEST_F()
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/art/runtime/arch/arm/
Dregisters_arm.h31 R4 = 4, enumerator
Dquick_method_frame_info_arm.h36 (1 << art::arm::R4) | (1 << art::arm::R9);
39 (1 << art::arm::R4) | (1 << art::arm::R9) | (1 << art::arm::R12);
/art/compiler/optimizing/
Dcodegen_test_utils.h99 blocked_core_registers_[arm::R4] = true; in SetupBlockedRegisters()
119 blocked_core_registers_[arm::R4] = true; in SetupBlockedRegisters()
/art/compiler/utils/arm/
Dassembler_thumb2_test.cc56 new arm::Register(arm::R4), in SetUpHelpers()
299 __ LoadFromOffset(type, arm::R4, arm::SP, 0); in TEST_F()
317 __ StoreToOffset(type, arm::R4, arm::SP, 0); in TEST_F()
335 __ LoadFromOffset(type, arm::R4, arm::SP, 0); in TEST_F()
355 __ StoreToOffset(type, arm::R4, arm::SP, 0); in TEST_F()
375 __ LoadFromOffset(type, arm::R4, arm::SP, 1024); in TEST_F()
397 __ StoreToOffset(type, arm::R4, arm::SP, 1024); in TEST_F()
419 __ LoadFromOffset(type, arm::R4, arm::PC, 1024); in TEST_F()
Dmanaged_register_arm_test.cc271 EXPECT_EQ(R4, reg.AsRegisterPairLow()); in TEST()
273 EXPECT_TRUE(reg.Equals(ArmManagedRegister::FromCoreRegisterPair(R4))); in TEST()