Searched refs:Shift (Results 1 – 11 of 11) sorted by relevance
| /art/compiler/utils/arm/ |
| D | constants_arm.h | 157 enum Shift { enum
166 std::ostream& operator<<(std::ostream& os, const Shift& rhs);
292 Shift ShiftField() const { return static_cast<Shift>( in ShiftField()
|
| D | assembler_arm.cc | 98 case arm::Shift::ROR: in encodingArm()
102 case arm::Shift::RRX: in encodingArm()
103 shift_type = static_cast<uint32_t>(arm::Shift::ROR); // Same encoding as ROR. in encodingArm()
|
| D | assembler_arm.h | 142 ShifterOperand(Register rm, Shift shift, uint32_t shift_imm = 0) : type_(kRegister), rm_(rm), in type_()
148 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm), in ShifterOperand()
183 Shift GetShift() const { in GetShift()
207 Shift shift_;
259 Address(Register rn, Register rm, Shift shift, uint32_t count, Mode am = Offset) :
299 Shift GetShift() const { in GetShift()
314 const Shift shift_;
|
| D | assembler_thumb2.h | 793 void EmitShift(Register rd, Register rm, Shift shift, uint8_t amount,
795 void EmitShift(Register rd, Register rn, Shift shift, Register rm,
|
| D | assembler_thumb2_test.cc | 1606 arm::Address mem_address(arm::R0, arm::R1, arm::Shift::LSL, 2); in TEST_F()
|
| D | assembler_thumb2.cc | 1794 Shift shift, in EmitShift()
1839 Shift shift, in EmitShift()
|
| /art/runtime/base/ |
| D | bit_field_test.cc | 30 ASSERT_EQ(1, TestBitFields::Shift()); in TEST()
|
| D | bit_field.h | 59 static int Shift() { in Shift() function
|
| /art/compiler/optimizing/ |
| D | common_arm64.h | 192 vixl::aarch64::Shift shift = vixl::aarch64::LSL,
308 inline vixl::aarch64::Shift ShiftFromOpKind(HDataProcWithShifterOp::OpKind op_kind) { in ShiftFromOpKind()
|
| D | code_generator_arm.cc | 1385 inline Shift ShiftFromOpKind(HDataProcWithShifterOp::OpKind op_kind) { in ShiftFromOpKind()
1454 static ShifterOperand GetShifterOperand(Register rm, Shift shift, uint32_t shift_imm) { in GetShifterOperand()
1474 const Shift shift = ShiftFromOpKind(instruction->GetOpKind()); in GenerateLongDataProc()
5673 Address mem_address(base, reg_offset, Shift::LSL, shift_count); in LoadFromShiftedRegOffset()
5708 Address mem_address(base, reg_offset, Shift::LSL, shift_count); in StoreToShiftedRegOffset()
5842 Address(temp, index.AsRegister<Register>(), Shift::LSL, 0)); in VisitArrayGet()
5846 Address(temp, index.AsRegister<Register>(), Shift::LSL, 1)); in VisitArrayGet()
8618 __ ldr(temp_reg, Address(temp_reg, key_reg, Shift::LSL, 2)); in VisitPackedSwitch()
|
| D | code_generator_arm_vixl.cc | 4115 __ Sub(out, temp1, Operand(temp1, vixl32::Shift(ASR), 31)); in GenerateDivRemWithAnyConstant()
4117 __ Sub(temp1, temp1, Operand(temp1, vixl32::Shift(ASR), 31)); in GenerateDivRemWithAnyConstant()
|