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/art/test/002-sleep/
Dinfo.txt3 in an ad-hoc way.
/art/compiler/utils/arm/
Dassembler_thumb2.h147 void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
148 void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
150 void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
151 void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
153 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
154 void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
156 void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
157 void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
160 void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
161 void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
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Dassembler_thumb2.cc815 void Thumb2Assembler::ldr(Register rd, const Address& ad, Condition cond) { in ldr() argument
816 EmitLoadStore(cond, true, false, false, false, rd, ad); in ldr()
820 void Thumb2Assembler::str(Register rd, const Address& ad, Condition cond) { in str() argument
821 EmitLoadStore(cond, false, false, false, false, rd, ad); in str()
825 void Thumb2Assembler::ldrb(Register rd, const Address& ad, Condition cond) { in ldrb() argument
826 EmitLoadStore(cond, true, true, false, false, rd, ad); in ldrb()
830 void Thumb2Assembler::strb(Register rd, const Address& ad, Condition cond) { in strb() argument
831 EmitLoadStore(cond, false, true, false, false, rd, ad); in strb()
835 void Thumb2Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh() argument
836 EmitLoadStore(cond, true, false, true, false, rd, ad); in ldrh()
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Dassembler_arm.h540 virtual void ldr(Register rd, const Address& ad, Condition cond = AL) = 0;
541 virtual void str(Register rd, const Address& ad, Condition cond = AL) = 0;
543 virtual void ldrb(Register rd, const Address& ad, Condition cond = AL) = 0;
544 virtual void strb(Register rd, const Address& ad, Condition cond = AL) = 0;
546 virtual void ldrh(Register rd, const Address& ad, Condition cond = AL) = 0;
547 virtual void strh(Register rd, const Address& ad, Condition cond = AL) = 0;
549 virtual void ldrsb(Register rd, const Address& ad, Condition cond = AL) = 0;
550 virtual void ldrsh(Register rd, const Address& ad, Condition cond = AL) = 0;
552 virtual void ldrd(Register rd, const Address& ad, Condition cond = AL) = 0;
553 virtual void strd(Register rd, const Address& ad, Condition cond = AL) = 0;
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/art/test/dexdump/
Dcheckers.txt251 001702: 7253 3400 6021 |00ad: invoke-interface {v0, v6, v1, v2, v3}, Landro…
879 001d56: 6200 6700 |01ad: sget-object v0, Lcom/google/android/checkers/…
1663 002752: 5200 4000 |01ad: iget v0, v0, Lcom/google/android/checkers/a;.…
2096 002c92: 3800 0800 |00ad: if-eqz v0, 00b5 // +0008
2783 003496: 3420 ad01 |0069: if-lt v0, v2, 0216 // +01ad
2980 00377a: 2900 53fe |01db: goto/16 002e // -01ad
3253 003b1e: 0800 1c00 |03ad: move-object/from16 v0, v28
3386 003d1e: 8244 |04ad: int-to-float v4, v4
3863 0040f2: 4b02 0001 |00ad: aput v2, v0, v1
3994 0042f2: 1302 0020 |01ad: const/16 v2, #int 8192 // #2000
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Dbytecodes.txt738 000dfe: 1802 3333 3333 3333 d33f |00ad: const-wide v2, #double 0.3 // #3fd33333333333…
1696 0017fa: 9b16 1618 |00ad: add-long v22, v22, v24