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Searched refs:imm10 (Results 1 – 4 of 4) sorted by relevance

/art/compiler/linker/arm/
Drelative_patcher_thumb2.cc54 uint32_t imm10 = (displacement >> 12) & 0x03ff; in PatchCall() local
58 uint32_t value = (signbit << 26) | (j1 << 13) | (j2 << 11) | (imm10 << 16) | imm11; in PatchCall()
/art/compiler/utils/mips64/
Dassembler_mips64.cc1606 void Mips64Assembler::LdiH(VectorRegister wd, int imm10) { in LdiH() argument
1608 CHECK(IsInt<10>(imm10)) << imm10; in LdiH()
1609 EmitMsaI10(0x6, 0x1, imm10 & kMsaS10Mask, wd, 0x7); in LdiH()
1612 void Mips64Assembler::LdiW(VectorRegister wd, int imm10) { in LdiW() argument
1614 CHECK(IsInt<10>(imm10)) << imm10; in LdiW()
1615 EmitMsaI10(0x6, 0x2, imm10 & kMsaS10Mask, wd, 0x7); in LdiW()
1618 void Mips64Assembler::LdiD(VectorRegister wd, int imm10) { in LdiD() argument
1620 CHECK(IsInt<10>(imm10)) << imm10; in LdiD()
1621 EmitMsaI10(0x6, 0x3, imm10 & kMsaS10Mask, wd, 0x7); in LdiD()
Dassembler_mips64.h738 void LdiH(VectorRegister wd, int imm10);
739 void LdiW(VectorRegister wd, int imm10);
740 void LdiD(VectorRegister wd, int imm10);
/art/compiler/utils/arm/
Dassembler_thumb2.cc3495 uint32_t imm10 = (offset >> 11) & 0x03ff; in EncodeBranchOffset() local
3499 value = (signbit << 26) | (j1 << 13) | (j2 << 11) | (imm10 << 16) | in EncodeBranchOffset()
3527 uint32_t imm10 = (instr >> 16) & 0x3FF; in DecodeBranchOffset() local
3532 imm32 = (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); in DecodeBranchOffset()