Searched refs:imm19 (Results 1 – 4 of 4) sorted by relevance
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 584 void Mips64Assembler::Lwpc(GpuRegister rs, uint32_t imm19) { in Lwpc() argument
585 CHECK(IsUint<19>(imm19)) << imm19; in Lwpc()
586 EmitI21(0x3B, rs, (0x01 << 19) | imm19); in Lwpc()
589 void Mips64Assembler::Lwupc(GpuRegister rs, uint32_t imm19) { in Lwupc() argument
590 CHECK(IsUint<19>(imm19)) << imm19; in Lwupc()
591 EmitI21(0x3B, rs, (0x02 << 19) | imm19); in Lwupc()
697 void Mips64Assembler::Addiupc(GpuRegister rs, uint32_t imm19) { in Addiupc() argument
698 CHECK(IsUint<19>(imm19)) << imm19; in Addiupc()
699 EmitI21(0x3B, rs, imm19); in Addiupc()
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| D | assembler_mips64.h | 514 void Lwpc(GpuRegister rs, uint32_t imm19);
515 void Lwupc(GpuRegister rs, uint32_t imm19); // MIPS64
544 void Addiupc(GpuRegister rs, uint32_t imm19);
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 694 void MipsAssembler::Lwpc(Register rs, uint32_t imm19) { in Lwpc() argument
696 CHECK(IsUint<19>(imm19)) << imm19; in Lwpc()
697 DsFsmInstrNop(EmitI21(0x3B, rs, (0x01 << 19) | imm19)); in Lwpc()
898 void MipsAssembler::Addiupc(Register rs, uint32_t imm19) { in Addiupc() argument
900 CHECK(IsUint<19>(imm19)) << imm19; in Addiupc()
901 DsFsmInstrNop(EmitI21(0x3B, rs, imm19)); in Addiupc()
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| D | assembler_mips.h | 275 void Lwpc(Register rs, uint32_t imm19); // R6
328 void Addiupc(Register rs, uint32_t imm19); // R6
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