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Searched refs:kStoreWord (Results 1 – 22 of 22) sorted by relevance

/art/compiler/utils/arm/
Djni_macro_assembler_arm.cc121 __ StoreToOffset(kStoreWord, R0, SP, 0); in BuildFrame()
132 __ StoreToOffset(kStoreWord, reg.AsCoreRegister(), SP, offset); in BuildFrame()
199 __ StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in Store()
202 __ StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); in Store()
203 __ StoreToOffset(kStoreWord, src.AsRegisterPairHigh(), SP, dest.Int32Value() + 4); in Store()
215 __ StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in StoreRef()
221 __ StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in StoreRawPtr()
230 __ StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in StoreSpanning()
232 __ StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + sizeof(uint32_t)); in StoreSpanning()
238 __ StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value()); in CopyRef()
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Djni_macro_assembler_arm_vixl.cc95 asm_.StoreToOffset(kStoreWord, r0, sp, 0); in BuildFrame()
106 asm_.StoreToOffset(kStoreWord, reg.AsVIXLRegister(), sp, offset); in BuildFrame()
176 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegister(), sp, dest.Int32Value()); in Store()
179 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegisterPairLow(), sp, dest.Int32Value()); in Store()
180 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegisterPairHigh(), sp, dest.Int32Value() + 4); in Store()
196 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegister(), sp, dest.Int32Value()); in StoreRef()
204 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegister(), sp, dest.Int32Value()); in StoreRawPtr()
213 asm_.StoreToOffset(kStoreWord, src.AsVIXLRegister(), sp, dest.Int32Value()); in StoreSpanning()
217 asm_.StoreToOffset(kStoreWord, scratch.AsVIXLRegister(), sp, dest.Int32Value() + 4); in StoreSpanning()
227 asm_.StoreToOffset(kStoreWord, scratch.AsVIXLRegister(), sp, dest.Int32Value()); in CopyRef()
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Dassembler_arm_shared.h37 kStoreWord, enumerator
Dassembler_arm_vixl.cc168 case kStoreWord: in GetAllowedStoreOffsetBits()
207 case kStoreWord: in CanHoldStoreOffsetThumb()
262 case kStoreWord: in StoreToOffset()
Dassembler_arm.cc324 case kStoreWord: in CanHoldStoreOffsetArm()
359 case kStoreWord: in CanHoldStoreOffsetThumb()
Dassembler_thumb2_test.cc391 arm::StoreOperandType type = arm::kStoreWord; in TEST_F()
435 arm::StoreOperandType type = arm::kStoreWord; in TEST_F()
451 arm::StoreOperandType type = arm::kStoreWord; in TEST_F()
Dassembler_thumb2.cc3756 case kStoreWord: in GetAllowedStoreOffsetBits()
3925 case kStoreWord: in StoreToOffset()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc106 case kStoreWord: in StoreWToOffset()
133 StoreWToOffset(kStoreWord, src.AsWRegister(), SP, offs.Int32Value()); in Store()
148 StoreWToOffset(kStoreWord, src.AsOverlappingWRegister(), SP, in StoreRef()
164 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), SP, in StoreImmediateToFrame()
384 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), in CopyRef()
397 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), SP, dest.Int32Value()); in Copy()
419 StoreWToOffset(kStoreWord, scratch.AsWRegister(), SP, dest.Int32Value()); in Copy()
440 StoreWToOffset(kStoreWord, scratch.AsWRegister(), base.AsXRegister(), in Copy()
475 StoreWToOffset(kStoreWord, scratch.AsWRegister(), dest.AsXRegister(), in Copy()
480 StoreWToOffset(kStoreWord, scratch.AsOverlappingWRegister(), dest.AsXRegister(), in Copy()
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Dassembler_arm64.h56 kStoreWord, enumerator
/art/compiler/utils/mips/
Dassembler_mips_test.cc1529 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, -0x8000); in TEST_F()
1530 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0); in TEST_F()
1531 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0x7FF8); in TEST_F()
1532 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0x7FFB); in TEST_F()
1533 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0x7FFC); in TEST_F()
1534 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0x7FFF); in TEST_F()
1535 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, -0xFFF0); in TEST_F()
1536 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, -0x8008); in TEST_F()
1537 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, -0x8001); in TEST_F()
1538 __ StoreToOffset(mips::kStoreWord, mips::A3, mips::A1, +0x8000); in TEST_F()
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Dassembler_mips.cc3320 StoreToOffset(kStoreWord, RA, SP, stack_offset); in BuildFrame()
3325 StoreToOffset(kStoreWord, reg, SP, stack_offset); in BuildFrame()
3330 StoreToOffset(kStoreWord, method_reg.AsMips().AsCoreRegister(), SP, 0); in BuildFrame()
3340 StoreToOffset(kStoreWord, reg.AsCoreRegister(), SP, offset); in BuildFrame()
3415 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in Store()
3418 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); in Store()
3419 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(), in Store()
3437 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in StoreRef()
3443 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); in StoreRawPtr()
3451 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value()); in StoreImmediateToFrame()
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Dassembler_mips.h54 kStoreWord, enumerator
547 case kStoreWord:
666 case kStoreWord:
/art/compiler/utils/mips64/
Dassembler_mips64_test.cc2046 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A0, 0); in TEST_F()
2047 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0); in TEST_F()
2048 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 4); in TEST_F()
2049 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 256); in TEST_F()
2050 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 1000); in TEST_F()
2051 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x7FFC); in TEST_F()
2052 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8000); in TEST_F()
2053 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8004); in TEST_F()
2054 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x10000); in TEST_F()
2055 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x12345678); in TEST_F()
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Dassembler_mips64.h287 kStoreWord, enumerator
934 case kStoreWord:
1057 case kStoreWord:
1090 case kStoreWord:
Dassembler_mips64.cc2800 StoreFpuToOffset((size == 4) ? kStoreWord : kStoreDoubleword, in BuildFrame()
2804 StoreToOffset((size == 4) ? kStoreWord : kStoreDoubleword, in BuildFrame()
2863 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); in Store()
2872 StoreFpuToOffset(kStoreWord, src.AsFpuRegister(), SP, dest.Int32Value()); in Store()
2882 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); in StoreRef()
2896 StoreToOffset(kStoreWord, scratch.AsGpuRegister(), SP, dest.Int32Value()); in StoreImmediateToFrame()
2995 StoreToOffset(kStoreWord, scratch.AsGpuRegister(), SP, dest.Int32Value()); in CopyRef()
/art/compiler/utils/
Dassembler_thumb_test.cc873 __ StoreToOffset(kStoreWord, R2, R4, 12); in TEST_F()
874 __ StoreToOffset(kStoreWord, R2, R4, 0xfff); in TEST_F()
875 __ StoreToOffset(kStoreWord, R2, R4, 0x1000); in TEST_F()
876 __ StoreToOffset(kStoreWord, R2, R4, 0x1000a4); in TEST_F()
877 __ StoreToOffset(kStoreWord, R2, R4, 0x101000); in TEST_F()
878 __ StoreToOffset(kStoreWord, R4, R4, 0x101000); in TEST_F()
892 __ StoreToOffset(kStoreWord, R0, R12, 12); // 32-bit because of R12. in TEST_F()
893 __ StoreToOffset(kStoreWord, R2, R4, 0xa4 - 0x100000); in TEST_F()
1775 __ StoreToOffset(kStoreWord, R2, R4, 12); in TEST_F()
1776 __ StoreToOffset(kStoreWord, R2, R4, 0xfff); in TEST_F()
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/art/compiler/optimizing/
Dcode_generator_arm.cc1921 __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index); in SaveCoreRegister()
2091 __ StoreToOffset(kStoreWord, IP, SP, -kShouldDeoptimizeFlagSize); in GenerateFrameEntry()
2102 __ StoreToOffset(kStoreWord, kMethodRegisterArgument, SP, 0); in GenerateFrameEntry()
2267 __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex()); in Move32()
2273 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in Move32()
2321 __ StoreToOffset(kStoreWord, R1, SP, destination.GetStackIndex()); in Move64()
2322 __ StoreToOffset(kStoreWord, R2, SP, destination.GetHighStackIndex(kArmWordSize)); in Move64()
5176 __ StoreToOffset(kStoreWord, temp, base, offset); in HandleFieldSet()
5178 __ StoreToOffset(kStoreWord, value.AsRegister<Register>(), base, offset); in HandleFieldSet()
5646 return kStoreWord; in GetStoreOperandType()
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Dcode_generator_mips.cc263 __ StoreToOffset(kStoreWord, out.AsRegister<Register>(), TMP, /* placeholder */ 0x5678); in EmitNativeCode()
320 __ StoreToOffset(kStoreWord, out, TMP, /* placeholder */ 0x5678); in EmitNativeCode()
1167 __ StoreToOffset(kStoreWord, TMP, SP, offset); in EmitSwap()
1179 __ StoreToOffset(kStoreWord, TMP, SP, offset_l); in EmitSwap()
1182 __ StoreToOffset(kStoreWord, TMP, SP, offset_h); in EmitSwap()
1226 __ StoreToOffset(kStoreWord, in Exchange()
1230 __ StoreToOffset(kStoreWord, TMP, SP, index1 + stack_offset); in Exchange()
1296 __ StoreToOffset(kStoreWord, reg, SP, ofs); in GenerateFrameEntry()
1313 __ StoreToOffset(kStoreWord, kMethodRegisterArgument, SP, kCurrentMethodStackOffset); in GenerateFrameEntry()
1318 __ StoreToOffset(kStoreWord, ZERO, SP, GetStackOffsetOfShouldDeoptimizeFlag()); in GenerateFrameEntry()
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Dcode_generator_arm_vixl.cc2178 GetAssembler()->StoreToOffset(kStoreWord, temp, sp, -kShouldDeoptimizeFlagSize); in GenerateFrameEntry()
2189 GetAssembler()->StoreToOffset(kStoreWord, kMethodRegister, sp, 0); in GenerateFrameEntry()
2361 GetAssembler()->StoreToOffset(kStoreWord, in Move32()
2372 GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex()); in Move32()
5178 GetAssembler()->StoreToOffset(kStoreWord, temp, base, offset); in HandleFieldSet()
5180 GetAssembler()->StoreToOffset(kStoreWord, RegisterFrom(value), base, offset); in HandleFieldSet()
5656 return kStoreWord; in GetStoreOperandType()
5664 return kStoreWord; in GetStoreOperandType()
6072 GetAssembler()->StoreToOffset(kStoreWord, value, array, offset); in VisitArraySet()
6109 GetAssembler()->StoreToOffset(kStoreWord, value, array, offset); in VisitArraySet()
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Dcode_generator_mips64.cc1041 StoreOperandType store_type = double_slot ? kStoreDoubleword : kStoreWord; in Exchange()
1125 __ StoreToOffset(kStoreWord, ZERO, SP, GetStackOffsetOfShouldDeoptimizeFlag()); in GenerateFrameEntry()
1284 StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; in MoveLocation()
1299 StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; in MoveLocation()
1322 __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); in MoveLocation()
1370 StoreOperandType store_type = mem_loc.IsStackSlot() ? kStoreWord : kStoreDoubleword; in SwapLocations()
2351 __ StoreConstToOffset(kStoreWord, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2354 __ StoreToOffset(kStoreWord, value, base_reg, data_offset, null_checker); in VisitArraySet()
2370 __ StoreConstToOffset(kStoreWord, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2398 __ StoreToOffset(kStoreWord, value, base_reg, data_offset, null_checker); in VisitArraySet()
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Dintrinsics_arm.cc2724 __ StoreToOffset(kStoreWord, IP, out, info.value_offset); in VisitIntegerValueOf()
2749 __ StoreToOffset(kStoreWord, in, out, info.value_offset); in VisitIntegerValueOf()
Dintrinsics_arm_vixl.cc3128 assembler->StoreToOffset(kStoreWord, temp, out, info.value_offset); in VisitIntegerValueOf()
3153 assembler->StoreToOffset(kStoreWord, in, out, info.value_offset); in VisitIntegerValueOf()