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Searched refs:mips64 (Results 1 – 25 of 42) sorted by relevance

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/art/compiler/utils/mips64/
Dassembler_mips64_test.cc32 bool operator()(const mips64::GpuRegister& a, const mips64::GpuRegister& b) const { in operator ()()
37 class AssemblerMIPS64Test : public AssemblerTest<mips64::Mips64Assembler,
38 mips64::GpuRegister,
39 mips64::FpuRegister,
41 mips64::VectorRegister> {
43 typedef AssemblerTest<mips64::Mips64Assembler,
44 mips64::GpuRegister,
45 mips64::FpuRegister,
47 mips64::VectorRegister> Base;
84 mips64::Mips64Assembler* CreateAssembler(ArenaAllocator* arena) OVERRIDE { in CreateAssembler()
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Dmanaged_register_mips64.h25 namespace mips64 {
156 constexpr inline mips64::Mips64ManagedRegister ManagedRegister::AsMips64() const { in AsMips64()
157 mips64::Mips64ManagedRegister reg(id_); in AsMips64()
Dmanaged_register_mips64.cc22 namespace mips64 { namespace
Dconstants_mips64.h28 namespace mips64 {
/art/runtime/arch/mips64/
Dquick_method_frame_info_mips64.h26 namespace mips64 {
29 (1 << art::mips64::RA);
31 (1 << art::mips64::S2) | (1 << art::mips64::S3) | (1 << art::mips64::S4) |
32 (1 << art::mips64::S5) | (1 << art::mips64::S6) | (1 << art::mips64::S7) |
33 (1 << art::mips64::GP) | (1 << art::mips64::S8);
35 (1 << art::mips64::A1) | (1 << art::mips64::A2) | (1 << art::mips64::A3) |
36 (1 << art::mips64::A4) | (1 << art::mips64::A5) | (1 << art::mips64::A6) |
37 (1 << art::mips64::A7);
39 (1 << art::mips64::S0) | (1 << art::mips64::S1);
41 (1 << art::mips64::AT) | (1 << art::mips64::V0) | (1 << art::mips64::V1) |
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Dfault_handler_mips64.cc44 *out_sp = static_cast<uintptr_t>(sc->sc_regs[mips64::SP]); in GetMethodAndReturnPcAndSp()
56 *out_method = reinterpret_cast<ArtMethod*>(sc->sc_regs[mips64::A0]); in GetMethodAndReturnPcAndSp()
85 sc->sc_regs[mips64::SP] -= mips64::Mips64CalleeSaveFrameSize(Runtime::kSaveEverything); in Action()
86 uintptr_t* padding = reinterpret_cast<uintptr_t*>(sc->sc_regs[mips64::SP]) + /* ArtMethod* */ 1; in Action()
89 sc->sc_regs[mips64::RA] = sc->sc_pc + 4; // RA needs to point to gc map location in Action()
120 uintptr_t sp = sc->sc_regs[mips64::SP]; in Action()
143 sc->sc_regs[mips64::T9] = sc->sc_pc; // make sure T9 points to the function in Action()
Dregisters_mips64.cc22 namespace mips64 { namespace
Dcontext_mips64.h26 namespace mips64 {
Dregisters_mips64.h27 namespace mips64 {
/art/compiler/
DAndroid.bp153 mips64: {
155 "jni/quick/mips64/calling_convention_mips64.cc",
156 "linker/mips64/relative_patcher_mips64.cc",
160 "utils/mips64/assembler_mips64.cc",
161 "utils/mips64/managed_register_mips64.cc",
234 "utils/mips64/assembler_mips64.h",
398 mips64: {
400 "linker/mips64/relative_patcher_mips64_test.cc",
401 "utils/mips64/managed_register_mips64_test.cc",
458 mips64: {
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/art/runtime/interpreter/mterp/
Drebuild.sh23 for arch in arm x86 mips arm64 x86_64 mips64; do TARGET_ARCH_EXT=$arch make -f Makefile_mterp; done
Dconfig_mips6423 asm-alt-stub mips64/alt_stub.S
26 import mips64/header.S
29 import mips64/entry.S
32 fallback-stub mips64/fallback.S
35 op-start mips64
298 import mips64/footer.S
/art/compiler/utils/
Dlabel.h39 namespace mips64 {
123 friend class mips64::Mips64Assembler;
Dmanaged_register.h36 namespace mips64 {
60 constexpr mips64::Mips64ManagedRegister AsMips64() const;
Djni_macro_assembler.cc99 return MacroAsm64UniquePtr(new (arena) mips64::Mips64Assembler( in Create()
/art/compiler/optimizing/
Doptimizing_cfi_test.cc270 #define __ down_cast<mips64::Mips64Assembler*>(GetCodeGenerator()->GetAssembler())-> in TEST_F()
271 mips64::Mips64Label target; in TEST_F()
272 __ Beqc(mips64::A1, mips64::A2, &target); in TEST_F()
Dintrinsics_mips64.h28 namespace mips64 {
/art/runtime/arch/
Dcontext.cc45 return new mips64::Mips64Context(); in Create()
Darch_test.cc100 namespace mips64 { namespace
155 TEST_ARCH(Mips64, mips64)
/art/runtime/
DAndroid.bp231 "arch/mips64/instruction_set_features_mips64.cc",
232 "arch/mips64/registers_mips64.cc",
328 mips64: {
332 "arch/mips64/context_mips64.cc",
333 "arch/mips64/entrypoints_init_mips64.cc",
334 "arch/mips64/jni_entrypoints_mips64.S",
335 "arch/mips64/memcmp16_mips64.S",
336 "arch/mips64/quick_entrypoints_mips64.S",
337 "arch/mips64/thread_mips64.cc",
339 "arch/mips64/fault_handler_mips64.cc",
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/art/build/
DAndroid.common.mk20 ART_TARGET_SUPPORTED_ARCH := arm arm64 mips mips64 x86 x86_64
/art/compiler/jni/quick/mips64/
Dcalling_convention_mips64.h24 namespace mips64 {
/art/compiler/jni/quick/
Dcalling_convention.cc77 new (arena) mips64::Mips64ManagedRuntimeCallingConvention( in Create()
184 new (arena) mips64::Mips64JniCallingConvention(is_static, in Create()
/art/runtime/entrypoints/quick/
Dcallee_save_frame.h82 isa == kMips64 ? mips64::Mips64CalleeSaveFrameSize(type) : in GetCalleeSaveFrameSize()
/art/compiler/trampolines/
Dtrampoline_compiler.cc170 namespace mips64 { namespace
255 return mips64::CreateTrampoline(&arena, abi, offset); in CreateTrampoline64()

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