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Searched refs:sd (Results 1 – 13 of 13) sorted by relevance

/art/runtime/interpreter/mterp/mips64/
Dentry.S43 sd t8, STACK_OFFSET_GP(sp)
45 sd ra, STACK_OFFSET_RA(sp)
48 sd s0, STACK_OFFSET_S0(sp)
50 sd s1, STACK_OFFSET_S1(sp)
52 sd s2, STACK_OFFSET_S2(sp)
54 sd s3, STACK_OFFSET_S3(sp)
56 sd s4, STACK_OFFSET_S4(sp)
58 sd s5, STACK_OFFSET_S5(sp)
60 sd s6, STACK_OFFSET_S6(sp)
64 sd a3, SHADOWFRAME_RESULT_REGISTER_OFFSET(a2)
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Dop_throw.S9 sd a0, THREAD_EXCEPTION_OFFSET(rSELF) # thread->exception <- obj
Dop_move_exception.S7 sd zero, THREAD_EXCEPTION_OFFSET(rSELF) # clear exception
Dfooter.S225 sd a0, 0(a2)
Dheader.S103 sd rPC, OFF_FP_DEX_PC_PTR(rFP)
/art/runtime/arch/mips64/
Djni_entrypoints_mips64.S29 sd $ra, 64($sp)
31 sd $a7, 56($sp)
33 sd $a6, 48($sp)
35 sd $a5, 40($sp)
37 sd $a4, 32($sp)
39 sd $a3, 24($sp)
41 sd $a2, 16($sp)
43 sd $a1, 8($sp)
45 sd $a0, 0($sp)
Dquick_entrypoints_mips64.S56 sd $ra, 152($sp)
58 sd $s8, 144($sp)
60 sd $t8, 136($sp) # t8 holds caller's gp, now save it to the stack.
119 sd $s7, 48($sp)
121 sd $s6, 40($sp)
123 sd $s5, 32($sp)
125 sd $s4, 24($sp)
127 sd $s3, 16($sp)
129 sd $s2, 8($sp)
135 sd $t1, 0($sp) # Place Method* at bottom of stack.
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/art/compiler/utils/arm/
Dassembler_arm.h590 virtual void vmovs(SRegister sd, SRegister sm, Condition cond = AL) = 0;
594 virtual bool vmovs(SRegister sd, float s_imm, Condition cond = AL) = 0;
597 virtual void vldrs(SRegister sd, const Address& ad, Condition cond = AL) = 0;
598 virtual void vstrs(SRegister sd, const Address& ad, Condition cond = AL) = 0;
602 virtual void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
604 virtual void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
606 virtual void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
608 virtual void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
610 virtual void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
612 virtual void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) = 0;
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Dassembler_thumb2.h205 void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
209 bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE;
212 void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
213 void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
217 void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
219 void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
221 void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
223 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
225 void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
227 void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
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Dassembler_thumb2.cc427 inline int32_t Thumb2Assembler::VldrsEncoding32(SRegister sd, Register rn, int32_t offset) { in VldrsEncoding32() argument
433 ((static_cast<int32_t>(sd) & 0x01) << (22 - 0)) | // Move D from bit 0 to bit 22. in VldrsEncoding32()
434 ((static_cast<int32_t>(sd) & 0x1e) << (12 - 1)) | // Move Vd from bits 1-4 to bits 12-15. in VldrsEncoding32()
926 bool Thumb2Assembler::vmovs(SRegister sd, float s_imm, Condition cond) { in vmovs() argument
934 sd, S0, S0); in vmovs()
956 void Thumb2Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) { in vmovs() argument
957 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm); in vmovs()
966 void Thumb2Assembler::vadds(SRegister sd, SRegister sn, SRegister sm, in vadds() argument
968 EmitVFPsss(cond, B21 | B20, sd, sn, sm); in vadds()
978 void Thumb2Assembler::vsubs(SRegister sd, SRegister sn, SRegister sm, in vsubs() argument
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/art/compiler/jni/
Djni_cfi_test_expected.inc416 // 0x00000004: sd r31, +104(r29)
418 // 0x00000008: sd r30, +96(r29)
420 // 0x0000000c: sd r28, +88(r29)
422 // 0x00000010: sd r23, +80(r29)
424 // 0x00000014: sd r22, +72(r29)
426 // 0x00000018: sd r21, +64(r29)
428 // 0x0000001c: sd r20, +56(r29)
430 // 0x00000020: sd r19, +48(r29)
432 // 0x00000024: sd r18, +40(r29)
434 // 0x00000028: sd r4, +0(r29)
/art/compiler/optimizing/
Doptimizing_cfi_test_expected.inc190 // 0x00000004: sd r31, +56(r29)
192 // 0x00000008: sd r17, +48(r29)
194 // 0x0000000c: sd r16, +40(r29)
415 // 0x00000004: sd r31, +56(r29)
417 // 0x00000008: sd r17, +48(r29)
419 // 0x0000000c: sd r16, +40(r29)
/art/runtime/interpreter/mterp/out/
Dmterp_mips64.S110 sd rPC, OFF_FP_DEX_PC_PTR(rFP)
344 sd t8, STACK_OFFSET_GP(sp)
346 sd ra, STACK_OFFSET_RA(sp)
349 sd s0, STACK_OFFSET_S0(sp)
351 sd s1, STACK_OFFSET_S1(sp)
353 sd s2, STACK_OFFSET_S2(sp)
355 sd s3, STACK_OFFSET_S3(sp)
357 sd s4, STACK_OFFSET_S4(sp)
359 sd s5, STACK_OFFSET_S5(sp)
361 sd s6, STACK_OFFSET_S6(sp)
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