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Searched refs:shifter (Results 1 – 11 of 11) sorted by relevance

/art/test/551-checker-shifter-operand/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/test/550-checker-multiply-accumulate/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/compiler/utils/x86/
Dassembler_x86.h347 void rorl(Register operand, Register shifter);
349 void roll(Register operand, Register shifter);
636 void shll(Register operand, Register shifter);
638 void shll(const Address& address, Register shifter);
640 void shrl(Register operand, Register shifter);
642 void shrl(const Address& address, Register shifter);
644 void sarl(Register operand, Register shifter);
646 void sarl(const Address& address, Register shifter);
647 void shld(Register dst, Register src, Register shifter);
649 void shrd(Register dst, Register src, Register shifter);
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Dassembler_x86.cc1997 void X86Assembler::shll(Register operand, Register shifter) { in shll() argument
1998 EmitGenericShift(4, Operand(operand), shifter); in shll()
2007 void X86Assembler::shll(const Address& address, Register shifter) { in shll() argument
2008 EmitGenericShift(4, address, shifter); in shll()
2017 void X86Assembler::shrl(Register operand, Register shifter) { in shrl() argument
2018 EmitGenericShift(5, Operand(operand), shifter); in shrl()
2027 void X86Assembler::shrl(const Address& address, Register shifter) { in shrl() argument
2028 EmitGenericShift(5, address, shifter); in shrl()
2037 void X86Assembler::sarl(Register operand, Register shifter) { in sarl() argument
2038 EmitGenericShift(7, Operand(operand), shifter); in sarl()
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Dassembler_x86_test.cc285 x86::Register shifter(x86::ECX); in rorl_fn() local
287 assembler->rorl(*reg, shifter); in rorl_fn()
308 x86::Register shifter(x86::ECX); in roll_fn() local
310 assembler->roll(*reg, shifter); in roll_fn()
/art/compiler/utils/x86_64/
Dassembler_x86_64.h679 void shll(CpuRegister operand, CpuRegister shifter);
681 void shrl(CpuRegister operand, CpuRegister shifter);
683 void sarl(CpuRegister operand, CpuRegister shifter);
686 void shlq(CpuRegister operand, CpuRegister shifter);
688 void shrq(CpuRegister operand, CpuRegister shifter);
690 void sarq(CpuRegister operand, CpuRegister shifter);
746 void rorl(CpuRegister operand, CpuRegister shifter);
748 void roll(CpuRegister operand, CpuRegister shifter);
751 void rorq(CpuRegister operand, CpuRegister shifter);
753 void rolq(CpuRegister operand, CpuRegister shifter);
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Dassembler_x86_64_test.cc370 x86_64::CpuRegister shifter(x86_64::RCX); in shll_fn() local
372 assembler->shll(*reg, shifter); in shll_fn()
393 x86_64::CpuRegister shifter(x86_64::RCX); in shlq_fn() local
395 assembler->shlq(*reg, shifter); in shlq_fn()
416 x86_64::CpuRegister shifter(x86_64::RCX); in shrl_fn() local
418 assembler->shrl(*reg, shifter); in shrl_fn()
439 x86_64::CpuRegister shifter(x86_64::RCX); in shrq_fn() local
441 assembler->shrq(*reg, shifter); in shrq_fn()
462 x86_64::CpuRegister shifter(x86_64::RCX); in sarl_fn() local
464 assembler->sarl(*reg, shifter); in sarl_fn()
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Dassembler_x86_64.cc2500 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll() argument
2501 EmitGenericShift(false, 4, operand, shifter); in shll()
2505 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq() argument
2506 EmitGenericShift(true, 4, operand, shifter); in shlq()
2520 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl() argument
2521 EmitGenericShift(false, 5, operand, shifter); in shrl()
2525 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq() argument
2526 EmitGenericShift(true, 5, operand, shifter); in shrq()
2535 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl() argument
2536 EmitGenericShift(false, 7, operand, shifter); in sarl()
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/art/compiler/optimizing/
Dcode_generator_x86.h222 void GenerateShlLong(const Location& loc, Register shifter);
223 void GenerateShrLong(const Location& loc, Register shifter);
224 void GenerateUShrLong(const Location& loc, Register shifter);
Dcode_generator_x86.cc4008 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) { in GenerateShlLong() argument
4010 __ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter); in GenerateShlLong()
4011 __ shll(loc.AsRegisterPairLow<Register>(), shifter); in GenerateShlLong()
4012 __ testl(shifter, Immediate(32)); in GenerateShlLong()
4040 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register shifter) { in GenerateShrLong() argument
4042 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter); in GenerateShrLong()
4043 __ sarl(loc.AsRegisterPairHigh<Register>(), shifter); in GenerateShrLong()
4044 __ testl(shifter, Immediate(32)); in GenerateShrLong()
4075 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, Register shifter) { in GenerateUShrLong() argument
4077 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter); in GenerateUShrLong()
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/art/test/530-checker-loops3/src/
DMain.java206 public static void shifter(int[] x) { in shifter() method in Main