| /art/compiler/optimizing/ |
| D | instruction_simplifier.cc | 53 bool ReplaceRotateWithRor(HBinaryOperation* op, HUShr* ushr, HShl* shl);
55 bool TryReplaceWithRotateConstantPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
56 bool TryReplaceWithRotateRegisterNegPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
57 bool TryReplaceWithRotateRegisterSubPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
297 HShl* shl) { in ReplaceRotateWithRor() argument
307 if (!shl->HasUses()) { in ReplaceRotateWithRor()
308 shl->GetBlock()->RemoveInstruction(shl); in ReplaceRotateWithRor()
310 if (!shl->GetRight()->HasUses()) { in ReplaceRotateWithRor()
311 shl->GetRight()->GetBlock()->RemoveInstruction(shl->GetRight()); in ReplaceRotateWithRor()
325 HShl* shl = left->IsShl() ? left->AsShl() : right->AsShl(); in TryReplaceWithRotate() local
[all …]
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| D | induction_var_analysis_test.cc | 294 HInstruction* shl = InsertInstruction( in TEST_F() local
303 EXPECT_STREQ("((2) * i + (0)):PrimInt", GetInductionInfo(shl, 0).c_str()); in TEST_F()
479 HInstruction* shl = InsertInstruction( in TEST_F() local
498 GetInductionInfo(shl, 0).c_str()); in TEST_F()
620 HInstruction* shl = InsertInstruction( in TEST_F() local
633 EXPECT_STREQ("", GetInductionInfo(shl, 0).c_str()); in TEST_F()
699 HInstruction* shl = InsertInstruction( in TEST_F() local
712 …EXPECT_STREQ("wrap(((100) * (4)), (((100) % (7)) * (4))):PrimInt", GetInductionInfo(shl, 0).c_str(… in TEST_F()
1019 HInstruction* shl = InsertInstruction( in TEST_F() local
1032 EXPECT_STREQ("periodic((2), (0)):PrimInt", GetInductionInfo(shl, 0).c_str()); in TEST_F()
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| D | code_generator_arm64.cc | 5515 void LocationsBuilderARM64::VisitShl(HShl* shl) { in VisitShl() argument
5516 HandleShift(shl); in VisitShl()
5519 void InstructionCodeGeneratorARM64::VisitShl(HShl* shl) { in VisitShl() argument
5520 HandleShift(shl); in VisitShl()
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| D | code_generator_mips64.cc | 5698 void LocationsBuilderMIPS64::VisitShl(HShl* shl) { in VisitShl() argument
5699 HandleShift(shl); in VisitShl()
5702 void InstructionCodeGeneratorMIPS64::VisitShl(HShl* shl) { in VisitShl() argument
5703 HandleShift(shl); in VisitShl()
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| D | code_generator_x86_64.cc | 4040 void LocationsBuilderX86_64::VisitShl(HShl* shl) { in VisitShl() argument
4041 HandleShift(shl); in VisitShl()
4044 void InstructionCodeGeneratorX86_64::VisitShl(HShl* shl) { in VisitShl() argument
4045 HandleShift(shl); in VisitShl()
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| D | code_generator_x86.cc | 4171 void LocationsBuilderX86::VisitShl(HShl* shl) { in VisitShl() argument
4172 HandleShift(shl); in VisitShl()
4175 void InstructionCodeGeneratorX86::VisitShl(HShl* shl) { in VisitShl() argument
4176 HandleShift(shl); in VisitShl()
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| D | code_generator_arm.cc | 4789 void LocationsBuilderARM::VisitShl(HShl* shl) { in VisitShl() argument
4790 HandleShift(shl); in VisitShl()
4793 void InstructionCodeGeneratorARM::VisitShl(HShl* shl) { in VisitShl() argument
4794 HandleShift(shl); in VisitShl()
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| D | code_generator_arm_vixl.cc | 4786 void LocationsBuilderARMVIXL::VisitShl(HShl* shl) { in VisitShl() argument
4787 HandleShift(shl); in VisitShl()
4790 void InstructionCodeGeneratorARMVIXL::VisitShl(HShl* shl) { in VisitShl() argument
4791 HandleShift(shl); in VisitShl()
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| D | code_generator_mips.cc | 7811 void LocationsBuilderMIPS::VisitShl(HShl* shl) { in VisitShl() argument
7812 HandleShift(shl); in VisitShl()
7815 void InstructionCodeGeneratorMIPS::VisitShl(HShl* shl) { in VisitShl() argument
7816 HandleShift(shl); in VisitShl()
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| /art/test/467-regalloc-pair/smali/ |
| D | TestCase.smali | 38 shl-long/2addr v4, v3
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| /art/test/dexdump/ |
| D | all.txt | 166 0004c0: 9800 0102 |0010: shl-int v0, v1, v2
177 0004ec: a300 0102 |0026: shl-long v0, v1, v2
213 000544: b810 |0008: shl-int/2addr v0, v1
224 00055a: c310 |0013: shl-long/2addr v0, v1
283 0005dc: e000 0112 |0010: shl-int/lit8 v0, v1, #int 18 // #12
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| D | checkers.txt | 1873 0029ee: e003 0501 |005f: shl-int/lit8 v3, v5, #int 1 // #01
1950 002aba: b820 |002d: shl-int/2addr v0, v2
1952 002abe: b831 |002f: shl-int/2addr v1, v3
1955 002ac4: b871 |0032: shl-int/2addr v1, v7
1957 002ac8: b864 |0034: shl-int/2addr v4, v6
2285 002ee4: e003 0003 |000e: shl-int/lit8 v3, v0, #int 3 // #03
2735 0033e6: e017 1603 |0011: shl-int/lit8 v23, v22, #int 3 // #03
3073 0038be: e007 0f01 |027d: shl-int/lit8 v7, v15, #int 1 // #01
5028 0053c2: e004 0403 |041d: shl-int/lit8 v4, v4, #int 3 // #03
5086 005498: e004 0405 |0488: shl-int/lit8 v4, v4, #int 5 // #05
[all …]
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| D | bytecodes.txt | 1447 001584: 9802 0809 |0036: shl-int v2, v8, v9
1492 0015d4: e00d 0d01 |0000: shl-int/lit8 v13, v13, #int 1 // #01
1495 0015e0: b8ed |0006: shl-int/2addr v13, v14
1505 001602: 9806 0e09 |0017: shl-int v6, v14, v9
1607 0016a4: a31c 1c16 |0002: shl-long v28, v28, v22
1615 0016c2: a31c 1c16 |0011: shl-long v28, v28, v22
1635 00170c: a30e 1e16 |0036: shl-long v14, v30, v22
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| /art/runtime/arch/x86/ |
| D | memcmp16_x86.S | 48 shl $1, %ecx
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| D | quick_entrypoints_x86.S | 1673 shl %cl,%eax
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| /art/runtime/arch/x86_64/ |
| D | memcmp16_x86_64.S | 47 shl $1, %rdx
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