Home
last modified time | relevance | path

Searched refs:value_reg (Results 1 – 12 of 12) sorted by relevance

/art/runtime/
Dmethod_handles.cc927 size_t value_reg = is_range ? (first_arg + 1) : args[1]; in DoInvokePolymorphicFieldAccess() local
934 value_reg); in DoInvokePolymorphicFieldAccess()
951 size_t value_reg = is_range ? first_arg : args[0]; in DoInvokePolymorphicFieldAccess() local
958 value_reg); in DoInvokePolymorphicFieldAccess()
/art/compiler/optimizing/
Dcode_generator_mips64.h306 void GenPackedSwitchWithCompares(GpuRegister value_reg,
311 void GenTableBasedPackedSwitch(GpuRegister value_reg,
Dcode_generator_mips.h334 void GenPackedSwitchWithCompares(Register value_reg,
339 void GenTableBasedPackedSwitch(Register value_reg,
Dintrinsics_x86_64.cc2452 Register value_reg = value.AsRegister(); in GenCAS() local
2458 value_reg = temp1.AsRegister(); in GenCAS()
2459 __ movl(CpuRegister(value_reg), base); in GenCAS()
2470 DCHECK_NE(value_reg, expected.AsRegister()); in GenCAS()
2474 __ PoisonHeapReference(CpuRegister(value_reg)); in GenCAS()
2477 __ LockCmpxchgl(field_addr, CpuRegister(value_reg)); in GenCAS()
2495 DCHECK_NE(value_reg, out.AsRegister()); in GenCAS()
2496 __ UnpoisonHeapReference(CpuRegister(value_reg)); in GenCAS()
Dcode_generator_x86.h296 void GenPackedSwitchWithCompares(Register value_reg,
Dcode_generator_x86.cc7411 void InstructionCodeGeneratorX86::GenPackedSwitchWithCompares(Register value_reg, in GenPackedSwitchWithCompares() argument
7425 __ cmpl(value_reg, Immediate(lower_bound)); in GenPackedSwitchWithCompares()
7439 __ cmpl(value_reg, Immediate(compare_to_value)); in GenPackedSwitchWithCompares()
7449 __ cmpl(value_reg, Immediate(lower_bound + index)); in GenPackedSwitchWithCompares()
7463 Register value_reg = locations->InAt(0).AsRegister<Register>(); in VisitPackedSwitch() local
7465 GenPackedSwitchWithCompares(value_reg, in VisitPackedSwitch()
7488 Register value_reg = locations->InAt(0).AsRegister<Register>(); in VisitX86PackedSwitch() local
7492 GenPackedSwitchWithCompares(value_reg, in VisitX86PackedSwitch()
7506 __ leal(temp_reg, Address(value_reg, -lower_bound)); in VisitX86PackedSwitch()
7507 value_reg = temp_reg; in VisitX86PackedSwitch()
[all …]
Dcode_generator_x86_64.cc650 Register value_reg = ref_reg; in EmitNativeCode() local
656 value_reg = temp1_.AsRegister(); in EmitNativeCode()
657 __ movl(CpuRegister(value_reg), base); in EmitNativeCode()
668 DCHECK_NE(value_reg, expected.AsRegister()); in EmitNativeCode()
672 __ PoisonHeapReference(CpuRegister(value_reg)); in EmitNativeCode()
675 __ LockCmpxchgl(field_addr_, CpuRegister(value_reg)); in EmitNativeCode()
684 __ UnpoisonHeapReference(CpuRegister(value_reg)); in EmitNativeCode()
6841 CpuRegister value_reg(value_reg_out); in VisitPackedSwitch() local
6844 __ cmpl(value_reg, Immediate(num_entries - 1)); in VisitPackedSwitch()
6852 __ movsxd(temp_reg, Address(base_reg, value_reg, TIMES_4, 0)); in VisitPackedSwitch()
Dcode_generator_mips64.cc6144 void InstructionCodeGeneratorMIPS64::GenPackedSwitchWithCompares(GpuRegister value_reg, in GenPackedSwitchWithCompares() argument
6151 __ Addiu32(temp_reg, value_reg, -lower_bound); in GenPackedSwitchWithCompares()
6180 void InstructionCodeGeneratorMIPS64::GenTableBasedPackedSwitch(GpuRegister value_reg, in GenTableBasedPackedSwitch() argument
6194 __ Addiu32(TMP, value_reg, -lower_bound); in GenTableBasedPackedSwitch()
6215 GpuRegister value_reg = locations->InAt(0).AsRegister<GpuRegister>(); in VisitPackedSwitch() local
6220 GenTableBasedPackedSwitch(value_reg, in VisitPackedSwitch()
6226 GenPackedSwitchWithCompares(value_reg, in VisitPackedSwitch()
Dcode_generator_mips.cc8377 void InstructionCodeGeneratorMIPS::GenPackedSwitchWithCompares(Register value_reg, in GenPackedSwitchWithCompares() argument
8384 __ Addiu32(temp_reg, value_reg, -lower_bound); in GenPackedSwitchWithCompares()
8413 void InstructionCodeGeneratorMIPS::GenTableBasedPackedSwitch(Register value_reg, in GenTableBasedPackedSwitch() argument
8428 __ Addiu32(TMP, value_reg, -lower_bound); in GenTableBasedPackedSwitch()
8454 Register value_reg = locations->InAt(0).AsRegister<Register>(); in VisitPackedSwitch() local
8465 GenTableBasedPackedSwitch(value_reg, in VisitPackedSwitch()
8472 GenPackedSwitchWithCompares(value_reg, in VisitPackedSwitch()
8492 Register value_reg = locations->InAt(0).AsRegister<Register>(); in VisitMipsPackedSwitch() local
8500 GenTableBasedPackedSwitch(value_reg, in VisitMipsPackedSwitch()
Dcode_generator_arm.cc5204 DRegister value_reg = FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()); in HandleFieldSet() local
5209 __ vmovrrd(value_reg_lo, value_reg_hi, value_reg); in HandleFieldSet()
5218 __ StoreDToOffset(value_reg, base, offset); in HandleFieldSet()
8559 Register value_reg = locations->InAt(0).AsRegister<Register>(); in VisitPackedSwitch() local
8569 __ AddConstantSetFlags(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch()
8608 __ AddConstant(key_reg, value_reg, -lower_bound); in VisitPackedSwitch()
8610 key_reg = value_reg; in VisitPackedSwitch()
Dcode_generator_arm_vixl.cc5207 vixl32::DRegister value_reg = DRegisterFrom(value); in HandleFieldSet() local
5212 __ Vmov(value_reg_lo, value_reg_hi, value_reg); in HandleFieldSet()
5222 GetAssembler()->StoreDToOffset(value_reg, base, offset); in HandleFieldSet()
8700 vixl32::Register value_reg = InputRegisterAt(switch_instr, 0); in VisitPackedSwitch() local
8712 __ Adds(temp_reg, value_reg, -lower_bound); in VisitPackedSwitch()
8745 __ Sub(key_reg, value_reg, lower_bound); in VisitPackedSwitch()
8747 key_reg = value_reg; in VisitPackedSwitch()
Dcode_generator_arm64.cc5762 Register value_reg = InputRegisterAt(switch_instr, 0); in VisitPackedSwitch() local
5779 __ Subs(temp, value_reg, Operand(lower_bound)); in VisitPackedSwitch()
5814 __ Sub(index, value_reg, Operand(lower_bound)); in VisitPackedSwitch()
5816 index = value_reg; in VisitPackedSwitch()