| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| D | QNCCommonDefinitions.h | 108 #define QNCMmioAddress( BaseAddr, Register ) \ argument
109 ( (UINTN)BaseAddr + \
116 #define QNCMmio64Ptr( BaseAddr, Register ) \ argument
117 ( (volatile UINT64 *)QNCMmioAddress( BaseAddr, Register ) )
119 #define QNCMmio64( BaseAddr, Register ) \ argument
120 *QNCMmio64Ptr( BaseAddr, Register )
122 #define QNCMmio64Or( BaseAddr, Register, OrData ) \ argument
123 QNCMmio64( BaseAddr, Register ) = \
125 QNCMmio64( BaseAddr, Register ) | \
129 #define QNCMmio64And( BaseAddr, Register, AndData ) \ argument
[all …]
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
| D | IohCommonDefinitions.h | 108 #define IohMmioAddress( BaseAddr, Register ) \ argument
109 ( (UINTN)BaseAddr + \
116 #define IohMmio64Ptr( BaseAddr, Register ) \ argument
117 ( (volatile UINT64 *)IohMmioAddress( BaseAddr, Register ) )
119 #define IohMmio64( BaseAddr, Register ) \ argument
120 *IohMmio64Ptr( BaseAddr, Register )
122 #define IohMmio64Or( BaseAddr, Register, OrData ) \ argument
123 IohMmio64( BaseAddr, Register ) = \
125 IohMmio64( BaseAddr, Register ) | \
129 #define IohMmio64And( BaseAddr, Register, AndData ) \ argument
[all …]
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| D | PchCommonDefinitions.h | 30 #define PchMmioAddress(BaseAddr, Register) ((UINTN) BaseAddr + (UINTN) (Register)) argument
35 #define PchMmio32Ptr(BaseAddr, Register) ((volatile UINT32 *) PchMmioAddress (BaseAddr, Register)) argument
37 #define PchMmio32(BaseAddr, Register) *PchMmio32Ptr (BaseAddr, Register) argument
39 #define PchMmio32Or(BaseAddr, Register, OrData) \ argument
40 PchMmio32 (BaseAddr, Register) = (UINT32) \
41 (PchMmio32 (BaseAddr, Register) | (UINT32) (OrData))
43 #define PchMmio32And(BaseAddr, Register, AndData) \ argument
44 PchMmio32 (BaseAddr, Register) = (UINT32) \
45 (PchMmio32 (BaseAddr, Register) & (UINT32) (AndData))
47 #define PchMmio32AndThenOr(BaseAddr, Register, AndData, OrData) \ argument
[all …]
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| D | VlvAccess.h | 36 #define MmioAddress( BaseAddr, Register ) \ argument
37 ( (UINTN)BaseAddr + \
46 #define Mmio32Ptr( BaseAddr, Register ) \ argument
47 ( (volatile UINT32 *)MmioAddress( BaseAddr, Register ) )
49 #define Mmio32( BaseAddr, Register ) \ argument
50 *Mmio32Ptr( BaseAddr, Register )
52 #define Mmio32Or( BaseAddr, Register, OrData ) \ argument
53 Mmio32( BaseAddr, Register ) = \
55 Mmio32( BaseAddr, Register ) | \
59 #define Mmio32And( BaseAddr, Register, AndData ) \ argument
[all …]
|
| /device/linaro/bootloader/edk2/OvmfPkg/PlatformPei/ |
| D | Xen.c | 192 if (Entry->BaseAddr >= BASE_4GB) { in XenPublishRamRegions()
193 AddUntestedMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length); in XenPublishRamRegions()
195 AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length); in XenPublishRamRegions()
198 MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack); in XenPublishRamRegions()
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/NorFlashDxe/ |
| D | NorFlashDxe.h | 50 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2)) argument
52 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CRE… argument
53 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) ) argument
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
| D | LegacyBootSupport.c | 1734 E820Table[0].BaseAddr = 0; in LegacyBiosBuildE820()
1741 E820Table[1].BaseAddr = E820Table[0].Length; in LegacyBiosBuildE820()
1757 E820Table[2].BaseAddr = 0xE0000; in LegacyBiosBuildE820()
1810 …dex].Type == TempType) && (EfiEntry->PhysicalStart == (E820Table[Index].BaseAddr + E820Table[Index… in LegacyBiosBuildE820()
1820 E820Table[Index].BaseAddr = EfiEntry->PhysicalStart; in LegacyBiosBuildE820()
1842 E820Table[Index].BaseAddr = ResourceHob->PhysicalStart; in LegacyBiosBuildE820()
1861 if (E820Table[TempNextIndex - 1].BaseAddr > E820Table[TempNextIndex].BaseAddr) { in LegacyBiosBuildE820()
1863 TempE820.BaseAddr = E820Table[TempNextIndex - 1].BaseAddr; in LegacyBiosBuildE820()
1867 E820Table[TempNextIndex - 1].BaseAddr = E820Table[TempNextIndex].BaseAddr; in LegacyBiosBuildE820()
1871 E820Table[TempNextIndex].BaseAddr = TempE820.BaseAddr; in LegacyBiosBuildE820()
[all …]
|
| D | LegacyBiosInterface.h | 489 UINT64 BaseAddr; member
|
| /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/ |
| D | E820.h | 31 UINT64 BaseAddr; member
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ |
| D | IdeMode.c | 1548 EFI_PHYSICAL_ADDRESS BaseAddr; in AtaUdmaInOut() local
1556 BaseAddr = 0; in AtaUdmaInOut()
1630 (VOID **)&BaseAddr, in AtaUdmaInOut()
1641 (VOID*)(UINTN)BaseAddr, in AtaUdmaInOut()
1652 PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr); in AtaUdmaInOut()
1656 ZeroMem ((VOID *) ((UINTN) BaseAddr), ByteCount); in AtaUdmaInOut()
1662 PrdTableBaseAddr = ((UINTN) BaseAddr + AlignmentMask) & ~AlignmentMask; in AtaUdmaInOut()
1685 PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr); in AtaUdmaInOut()
1755 Task->MapBaseAddress = (EFI_ATA_DMA_PRD*)(UINTN)BaseAddr; in AtaUdmaInOut()
1843 PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr); in AtaUdmaInOut()
|
| D | AhciMode.c | 525 UINT64 BaseAddr; in AhciBuildCommand() local
547 BaseAddr = Data64.Uint64; in AhciBuildCommand()
549 ZeroMem ((VOID *)((UINTN) BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS)); in AhciBuildCommand()
|
| /device/linaro/bootloader/edk2/BaseTools/UserManuals/ |
| D | GenVtf_Utility_Man_Page.rtf | 78 \hich\af39\dbch\af31505\loch\f39 f <FileName> -r <BaseAddr> -s <Size>}{\rtlch\fcs1 \ab\af39\afs18 \…
|