Searched refs:CCSIDR (Results 1 – 5 of 5) sorted by relevance
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/ArmV7/ |
| D | ArmLibSupportV7.asm | 86 mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
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| D | ArmLibSupportV7.S | 101 mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
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| D | ArmV7Support.asm | 190 mrc p15, 1, R12, c0, c0, 0 ; reads current Cache Size ID register (CCSIDR)
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| D | ArmV7Support.S | 228 mrc p15, 1, R12, c0, c0, 0 @ reads current Cache Size ID register (CCSIDR)
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| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
| D | core_cm7.h | 434 …__I uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register … member
1939 ccsidr = SCB->CCSIDR; in SCB_EnableDCache()
1974 ccsidr = SCB->CCSIDR; in SCB_DisableDCache()
2009 ccsidr = SCB->CCSIDR; in SCB_InvalidateDCache()
2041 ccsidr = SCB->CCSIDR; in SCB_CleanDCache()
2073 ccsidr = SCB->CCSIDR; in SCB_CleanInvalidateDCache()
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