| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| D | DisableCache.S | 18 # Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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| D | DisableCache.asm | 18 ; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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| D | EnableCache.S | 18 # Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
19 # the NW bit of CR0 to 0
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| D | EnableCache.asm | 18 ; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
19 ; the NW bit of CR0 to 0
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| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/X64/ |
| D | EnableCache.S | 18 # Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
19 # the NW bit of CR0 to 0
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| D | EnableCache.asm | 18 ; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
19 ; the NW bit of CR0 to 0
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| D | DisableCache.S | 18 # Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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| D | DisableCache.asm | 18 ; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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| D | DisablePaging64.S | 66 btr $0x1f,%eax # clear CR0.PG
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| D | DisablePaging64.asm | 65 btr eax, 31 ; Clear CR0.PG
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Thunk16/Ia32/ |
| D | Thunk16.S | 92 mov %esi,0x6(%edi) #; save CR0
93 and $0x7ffffffe,%esi #; esi <- CR0 to set
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| D | Thunk16.asm | 123 mov [edi + 6], esi ; save CR0
124 and esi, NOT 80000001h ; esi <- CR0 to set
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Thunk16/X64/ |
| D | Thunk16.S | 122 mov %cr0,%rax #save CR0
123 mov %eax,%esi #esi <- CR0 to set
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| D | Thunk16.asm | 118 mov rax, cr0 ; save CR0
119 mov esi, eax ; esi <- CR0 to set
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/X64/ |
| D | MpFuncs.S | 112 .byte 0xF,0x20,0xC0 # mov eax, cr0 ; Read CR0.
114 .byte 0xF,0x22,0xC0 # mov cr0, eax ; Write CR0.
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| D | MpFuncs.asm | 98 db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Read CR0.
100 db 0Fh, 22h, 0C0h ; mov cr0, eax ; Write CR0.
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| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/X64/ |
| D | MpFuncs.S | 115 .byte 0xF,0x20,0xC0 # mov eax, cr0 ; Read CR0.
117 .byte 0xF,0x22,0xC0 # mov cr0, eax ; Write CR0.
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| D | MpFuncs.asm | 116 db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Read CR0.
118 db 0Fh, 22h, 0C0h ; mov cr0, eax ; Write CR0.
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| /device/linaro/bootloader/edk2/DuetPkg/BootSector/ |
| D | st32_64.S | 451 # Enable Protect Mode (set CR0.PE=1)
453 movl %cr0, %eax # Read CR0.
455 movl %eax, %cr0 # Write CR0.
523 # Enable paging to activate long mode (set CR0.PG=1)
525 movl %cr0, %eax # Read CR0.
531 movl %eax, %cr0 # Write CR0.
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| D | start64.S | 443 # Enable Protect Mode (set CR0.PE=1)
445 movl %cr0, %eax # Read CR0.
447 movl %eax, %cr0 # Write CR0.
515 # Enable paging to activate long mode (set CR0.PG=1)
517 movl %cr0, %eax # Read CR0.
523 movl %eax, %cr0 # Write CR0.
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| D | st16_64.S | 436 # Enable Protect Mode (set CR0.PE=1)
438 movl %cr0, %eax # Read CR0.
440 movl %eax, %cr0 # Write CR0.
508 # Enable paging to activate long mode (set CR0.PG=1)
510 movl %cr0, %eax # Read CR0.
516 movl %eax, %cr0 # Write CR0.
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| D | st16_64.asm | 431 ; Enable Protect Mode (set CR0.PE=1)
433 mov eax, cr0 ; Read CR0.
435 mov cr0, eax ; Write CR0.
503 ; Enable paging to activate long mode (set CR0.PG=1)
505 mov eax, cr0 ; Read CR0.
511 mov cr0, eax ; Write CR0.
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| D | st32_64.asm | 447 ; Enable Protect Mode (set CR0.PE=1)
449 mov eax, cr0 ; Read CR0.
451 mov cr0, eax ; Write CR0.
519 ; Enable paging to activate long mode (set CR0.PG=1)
521 mov eax, cr0 ; Read CR0.
527 mov cr0, eax ; Write CR0.
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| D | start64.asm | 438 ; Enable Protect Mode (set CR0.PE=1)
440 mov eax, cr0 ; Read CR0.
442 mov cr0, eax ; Write CR0.
510 ; Enable paging to activate long mode (set CR0.PG=1)
512 mov eax, cr0 ; Read CR0.
518 mov cr0, eax ; Write CR0.
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmBase/ |
| D | SmmBase.h | 165 UINT32 CR0; member
214 UINT32 CR0; // FFF8 member
341 UINT32 CR0; member
|