| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/AcpiTables/ |
| D | AcpiSsdtRootPci.asl | 124 Name(CTRL, Zero) // PCI _OSC Control Field value
139 Store(CDW3,CTRL)
146 And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
152 And(CTRL,0x1D,CTRL)
157 If(And(CTRL,0x01)) { // Hot plug control granted?
161 If(And(CTRL,0x04)) { // PME control granted?
165 If(And(CTRL,0x10)) { // OS restoring PCIe cap structure?
177 If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
181 Store(CTRL,CDW3)
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/ |
| D | AcpiSsdtRootPci.asl | 124 Name(CTRL, Zero) // PCI _OSC Control Field value
139 Store(CDW3,CTRL)
146 And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
152 And(CTRL,0x1D,CTRL)
157 If(And(CTRL,0x01)) { // Hot plug control granted?
161 If(And(CTRL,0x04)) { // PME control granted?
165 If(And(CTRL,0x10)) { // OS restoring PCIe cap structure?
177 If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
181 Store(CTRL,CDW3)
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| D | HOST_BUS.ASL | 299 Name(CTRL,0) // PCI _OSC Control Field value
317 Store(CDW3,CTRL)
322 If(And(CTRL,0x02))
326 If(And(CTRL,0x04)) // PME control granted?
338 If(LNotEqual(CDW3,CTRL))
344 And(CTRL,0xfe,CTRL)
345 Store(CTRL,CDW3)
346 Store(CTRL,OSCC)
|
| /device/google/contexthub/firmware/os/platform/stm32/ |
| D | mpu.c | 26 volatile uint32_t CTRL; member
109 …MPU->CTRL = 0x07; //MPU on, even during faults, supervisor default: allow, user default: default d… in mpuStart()
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| D | platform.c | 286 SysTick->CTRL = 0; in platInitialize()
289 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in platInitialize()
427 SysTick->CTRL &= ~(SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); in sleepClockRtcPrepare()
434 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in sleepClockRtcWake()
448 SysTick->CTRL &= ~(SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); in sleepClockTmrPrepare()
460 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in sleepClockTmrWake()
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| /device/linaro/bootloader/edk2/NetworkPkg/UefiPxeBcDxe/ |
| D | PxeBcBoot.c | 205 case CTRL ('c'): in PxeBcSelectBootPrompt()
209 case CTRL ('m'): in PxeBcSelectBootPrompt()
369 case CTRL ('c'): in PxeBcSelectBootMenu()
373 case CTRL ('j'): /* linefeed */ in PxeBcSelectBootMenu()
374 case CTRL ('m'): /* return */ in PxeBcSelectBootMenu()
378 case CTRL ('i'): /* tab */ in PxeBcSelectBootMenu()
385 case CTRL ('h'): /* backspace */ in PxeBcSelectBootMenu()
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| D | PxeBcDhcp4.h | 129 #define CTRL(x) (0x1F & (x)) macro
|
| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
| D | core_cm0plus.h | 462 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
513 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
803 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_sc000.h | 481 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
532 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
823 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_cm0.h | 441 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
692 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_cm3.h | 612 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
763 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1063 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
1559 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_sc300.h | 592 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
743 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1043 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
1539 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_cm4.h | 652 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
803 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1103 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
1711 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| D | core_cm7.h | 833 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
984 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1287 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
2130 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/Network/UefiPxeBcDxe/ |
| D | PxeBcDhcp.c | 1708 case CTRL ('c'): in PxeBcSelectBootPrompt()
1712 case CTRL ('m'): in PxeBcSelectBootPrompt()
1861 case CTRL ('c'): in PxeBcSelectBootMenu()
1865 case CTRL ('j'): /* linefeed */ in PxeBcSelectBootMenu()
1866 case CTRL ('m'): /* return */ in PxeBcSelectBootMenu()
1870 case CTRL ('i'): /* tab */ in PxeBcSelectBootMenu()
1877 case CTRL ('h'): /* backspace */ in PxeBcSelectBootMenu()
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| D | PxeBcDhcp.h | 124 #define CTRL(x) (0x1F & (x)) macro
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| /device/linaro/bootloader/edk2/ShellPkg/Application/Shell/ |
| D | Shell.uni | 54 #string STR_SHELL_NO_IN_EX #language en-US "No SimpleTextInputEx was found. CTRL-based f…
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| /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellBcfgCommandLib/ |
| D | UefiShellBcfgCommandLib.uni | 146 " * To assign a CTRL-B hot-key to boot option #3:\r\n"
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| /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDriver1CommandsLib/ |
| D | UefiShellDriver1CommandsLib.uni | 86 "CTRL E G G #P #D #C Device Name\r\n"
453 " CTRL - The handle number of the UEFI device\r\n"
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| /device/linaro/bootloader/edk2/BaseTools/UserManuals/ |
| D | Intel_UEFI_Packaging_Tool_Man_Page.rtf | 385 …If Intel UEFIPT should be stopped for some reason (for example, you press CTRL+C) the UPT database…
|