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Searched refs:DRAMC_REGISTER_Q35 (Results 1 – 3 of 3) sorted by relevance

/device/linaro/bootloader/edk2/OvmfPkg/SmmAccess/
DSmramInternal.c46 SmramVal = PciRead8 (DRAMC_REGISTER_Q35 (MCH_SMRAM)); in GetStates()
47 EsmramcVal = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)); in GetStates()
73 PciAnd8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), in SmramAccessOpen()
92 PciOr8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), MCH_ESMRAMC_T_EN); in SmramAccessClose()
114 PciOr8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), MCH_ESMRAMC_T_EN); in SmramAccessLock()
115 PciOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM), MCH_SMRAM_D_LCK); in SmramAccessLock()
146 TsegMemoryBaseMb = PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB)); in SmramAccessGetCapabilities()
171 TsegSizeBits = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)) & in SmramAccessGetCapabilities()
DSmmAccessPei.c280 EsmramcVal = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)); in SmmAccessPeiEntryPoint()
301 PciWrite16 (DRAMC_REGISTER_Q35 (MCH_GGC), MCH_GGC_IVD); in SmmAccessPeiEntryPoint()
306 PciWrite16 (DRAMC_REGISTER_Q35 (MCH_TOLUD), in SmmAccessPeiEntryPoint()
313 PciWrite32 (DRAMC_REGISTER_Q35 (MCH_GBSM), in SmmAccessPeiEntryPoint()
315 PciWrite32 (DRAMC_REGISTER_Q35 (MCH_BGSM), in SmmAccessPeiEntryPoint()
321 PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB), in SmmAccessPeiEntryPoint()
334 PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal); in SmmAccessPeiEntryPoint()
340 PciAndThenOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM), in SmmAccessPeiEntryPoint()
/device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
DQ35MchIch9.h31 #define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset)) macro