Searched refs:EHC_USBSTS_OFFSET (Results 1 – 6 of 6) sorted by relevance
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciDxe/ |
D | EhciReg.c | 317 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_IAA, TRUE, Timeout); in EhcSetAndWaitDoorBell() 323 Data = EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET); in EhcSetAndWaitDoorBell() 327 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data); in EhcSetAndWaitDoorBell() 345 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK); in EhcAckAllInterrupt() 370 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, TRUE, Timeout); in EhcEnablePeriodSchd() 395 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, FALSE, Timeout); in EhcDisablePeriodSchd() 421 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_ASYNC_ENABLED, TRUE, Timeout); in EhcEnableAsyncSchd() 447 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_ASYNC_ENABLED, FALSE, Timeout); in EhcDisableAsyncSchd() 467 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT); in EhcIsHalt() 485 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR); in EhcIsSysError() [all …]
|
D | EhciReg.h | 42 #define EHC_USBSTS_OFFSET 0x04 // Statue register offset macro
|
D | EhciDebug.c | 248 …UG ((EFI_D_VERBOSE, " EHC_USBSTS_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET))); in EhcDumpRegs()
|
D | Ehci.c | 230 if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) { in EhcGetState() 286 if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR)) { in EhcSetState() 296 if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) { in EhcSetState()
|
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciPei/ |
D | EhcPeim.c | 210 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_IAA, TRUE, Timeout); in EhcSetAndWaitDoorBell() 216 Data = EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET); in EhcSetAndWaitDoorBell() 220 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data); in EhcSetAndWaitDoorBell() 237 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK); in EhcAckAllInterrupt() 261 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, TRUE, Timeout); in EhcEnablePeriodSchd() 285 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_ASYNC_ENABLED, TRUE, Timeout); in EhcEnableAsyncSchd() 303 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT); in EhcIsHalt() 320 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR); in EhcIsSysError() 344 if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) { in EhcResetHC() 376 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout); in EhcHaltHC() [all …]
|
D | EhciReg.h | 39 #define EHC_USBSTS_OFFSET 0x04 // Statue register offset macro
|