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Searched refs:EhcWriteOpReg (Results 1 – 7 of 7) sorted by relevance

/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciPei/
DEhcPeim.c73 EhcWriteOpReg ( in EhcWriteOpReg() function
105 EhcWriteOpReg (Ehc, Offset, Data); in EhcSetOpRegBit()
127 EhcWriteOpReg (Ehc, Offset, Data); in EhcClearOpRegBit()
220 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data); in EhcSetAndWaitDoorBell()
237 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK); in EhcAckAllInterrupt()
478 EhcWriteOpReg (Ehc, EHC_CTRLDSSEG_OFFSET, Ehc->High32bitAddr); in EhcInitHC()
483 EhcWriteOpReg (Ehc, EHC_USBINTR_OFFSET, 0); in EhcInitHC()
726 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
738 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
746 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
[all …]
DEhciSched.c169 EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame)); in EhcInitSched()
176 EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (Ehc->ReclaimHead)); in EhcInitSched()
191 EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0); in EhcFreeSched()
192 EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0); in EhcFreeSched()
DEhciReg.h158 EhcWriteOpReg (
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciDxe/
DEhciReg.c141 EhcWriteOpReg ( in EhcWriteOpReg() function
185 EhcWriteOpReg (Ehc, Offset, Data); in EhcSetOpRegBit()
208 EhcWriteOpReg (Ehc, Offset, Data); in EhcClearOpRegBit()
327 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data); in EhcSetAndWaitDoorBell()
345 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK); in EhcAckAllInterrupt()
617 EhcWriteOpReg (Ehc, EHC_USBINTR_OFFSET, 0); in EhcInitHC()
DEhci.c471 EhcWriteOpReg (Ehc, Offset, State); in EhcSetRootHubPortFeature()
476 EhcWriteOpReg (Ehc, Offset, State); in EhcSetRootHubPortFeature()
497 EhcWriteOpReg (Ehc, Offset, State); in EhcSetRootHubPortFeature()
506 EhcWriteOpReg (Ehc, Offset, State); in EhcSetRootHubPortFeature()
512 EhcWriteOpReg (Ehc, Offset, State); in EhcSetRootHubPortFeature()
578 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
590 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
598 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
606 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
614 EhcWriteOpReg (Ehc, Offset, State); in EhcClearRootHubPortFeature()
[all …]
DEhciSched.c168 EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (PhyAddr)); in EhcInitSched()
172 EhcWriteOpReg (Ehc, EHC_CTRLDSSEG_OFFSET, EHC_HIGH_32BIT (PhyAddr)); in EhcInitSched()
224 EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr)); in EhcInitSched()
264 EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0); in EhcFreeSched()
265 EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0); in EhcFreeSched()
DEhciReg.h180 EhcWriteOpReg (