Searched refs:IA32_PG_P (Results 1 – 9 of 9) sorted by relevance
24 #define IA32_PG_P BIT0 macro210 *Uplink = Address | IA32_PG_P | IA32_PG_RW; in AcquirePage()245 if ((PageTable[PTIndex] & IA32_PG_P) == 0) { in PageFaultHandler()252 PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()254 if ((PageTable[PTIndex] & IA32_PG_P) == 0) { in PageFaultHandler()260 PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()
23 #define IA32_PG_P BIT0 macro131 *Uplink = Address | IA32_PG_P | IA32_PG_RW; in AcquirePage()179 if ((PageTable[PTIndex] & IA32_PG_P) == 0) { in PageFaultHandler()186 PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()188 if ((PageTable[PTIndex] & IA32_PG_P) == 0) { in PageFaultHandler()194 PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()
298 if ((Pml4[Pml4Index] & IA32_PG_P) == 0 || (Pml4[Pml4Index] & IA32_PG_PMNT) != 0) { in ReclaimPages()307 if ((Pdpt[PdptIndex] & IA32_PG_P) == 0 || (Pdpt[PdptIndex] & IA32_PG_PMNT) != 0) { in ReclaimPages()328 if ((Pdt[PdtIndex] & IA32_PG_P) == 0 || (Pdt[PdtIndex] & IA32_PG_PMNT) != 0) { in ReclaimPages()590 if ((PageTable[PTIndex] & IA32_PG_P) == 0) { in SmiDefaultPFHandler()611 if ((PageTable[PTIndex] & IA32_PG_P) != 0) { in SmiDefaultPFHandler()
168 if ((PageTable[PTIndex] & IA32_PG_P) != 0) { in RestorePageTableAbove4G()172 if ((PageTable[PTIndex] & IA32_PG_P) != 0) { in RestorePageTableAbove4G()
72 #define IA32_PG_P BIT0 macro85 #define PAGE_ATTRIBUTE_BITS (IA32_PG_RW | IA32_PG_P)90 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
516 if ((Pml4[Level1] & IA32_PG_P) == 0) { in InitPaging()527 if ((*Pde & IA32_PG_P) == 0) { in InitPaging()538 if ((*Pte & IA32_PG_P) == 0) { in InitPaging()574 if ((Pml4[Level1] & IA32_PG_P) == 0) { in InitPaging()585 if ((*Pde & IA32_PG_P) == 0) { in InitPaging()596 if ((*Pte & IA32_PG_P) == 0) { in InitPaging()
859 ASSERT (PageTable[PTIndex] & IA32_PG_P); in SetCacheability()864 ASSERT (PageTable[PTIndex] & IA32_PG_P); in SetCacheability()894 ASSERT (PageTable[PTIndex] & IA32_PG_P); in SetCacheability()898 ASSERT (PageTable[PTIndex] & IA32_PG_P); in SetCacheability()
73 *PageEntry2M = (UINT64) (UINTN) PageTableEntry | IA32_PG_P | IA32_PG_RW; in Split2MPageTo4K()117 *PageEntry1G = (UINT64) (UINTN) PageDirectoryEntry | IA32_PG_P | IA32_PG_RW; in Split1GPageTo2M()
148 #define IA32_PG_P BIT0 macro