Searched refs:IA32_PG_PS (Results 1 – 7 of 7) sorted by relevance
26 #define IA32_PG_PS BIT7 macro252 PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()260 PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()
25 #define IA32_PG_PS BIT7 macro186 PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()194 PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; in PageFaultHandler()
319 if ((Pdpt[PdptIndex] & IA32_PG_PS) == 0) { in ReclaimPages()340 if ((Pdt[PdtIndex] & IA32_PG_PS) == 0) { in ReclaimPages()561 PageAttribute |= (UINTN)IA32_PG_PS; in SmiDefaultPFHandler()572 PageAttribute |= (UINTN)IA32_PG_PS; in SmiDefaultPFHandler()
177 if ((PageTable[PTIndex] & IA32_PG_PS) != 0) { in RestorePageTableAbove4G()
79 #define IA32_PG_PS BIT7 macro81 #define IA32_PG_PAT_4K IA32_PG_PS
549 if (((*Pte & IA32_PG_PS) != 0) && IsAddressSplit (Address)) { in InitPaging()604 if ((*Pte & IA32_PG_PS) != 0) { in InitPaging()1224 if ((PageTable[PTIndex] & IA32_PG_PS) != 0) { in RestorePageTableBelow4G()1246 PageTable[PTIndex] |= (UINT64)IA32_PG_PS; in RestorePageTableBelow4G()
798 Pte[Index] = (Index << 21) | IA32_PG_PS | PAGE_ATTRIBUTE_BITS; in Gen4GPageTable()873 if ((PageTable[PTIndex] & IA32_PG_PS) != 0) { in SetCacheability()