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Searched refs:IRQn (Results 1 – 13 of 13) sorted by relevance

/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
Dcore_cm0.h533 #define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) argument
534 #define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) ) argument
535 #define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) ) argument
544 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
546 NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_EnableIRQ()
556 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
558 NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_DisableIRQ()
572 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
584 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
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Dcore_cm0plus.h644 #define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) argument
645 #define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) ) argument
646 #define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) ) argument
655 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
657 NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_EnableIRQ()
667 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
669 NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_DisableIRQ()
683 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
685 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
695 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
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Dcore_sc000.h664 #define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) argument
665 #define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) ) argument
666 #define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) ) argument
675 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
677 NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_EnableIRQ()
687 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
689 NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_DisableIRQ()
703 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
705 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
715 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
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Dcore_cm3.h1343 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
1345 NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ in NVIC_EnableIRQ()
1355 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
1357 NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ in NVIC_DisableIRQ()
1371 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
1373 …return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /… in NVIC_GetPendingIRQ()
1383 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
1385 …NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ in NVIC_SetPendingIRQ()
1395 __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) in NVIC_ClearPendingIRQ() argument
1397 …NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt… in NVIC_ClearPendingIRQ()
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Dcore_sc300.h1323 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
1325 NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ in NVIC_EnableIRQ()
1335 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
1337 NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ in NVIC_DisableIRQ()
1351 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
1353 …return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /… in NVIC_GetPendingIRQ()
1363 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
1365 …NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ in NVIC_SetPendingIRQ()
1375 __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) in NVIC_ClearPendingIRQ() argument
1377 …NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt… in NVIC_ClearPendingIRQ()
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Dcore_cm4.h1494 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
1497 …NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_… in NVIC_EnableIRQ()
1507 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
1509 NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ in NVIC_DisableIRQ()
1523 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
1525 …return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /… in NVIC_GetPendingIRQ()
1535 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
1537 …NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ in NVIC_SetPendingIRQ()
1547 __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) in NVIC_ClearPendingIRQ() argument
1549 …NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt… in NVIC_ClearPendingIRQ()
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Dcore_cm7.h1681 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) in NVIC_EnableIRQ() argument
1684 …NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_… in NVIC_EnableIRQ()
1694 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) in NVIC_DisableIRQ() argument
1696 NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ in NVIC_DisableIRQ()
1710 __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) in NVIC_GetPendingIRQ() argument
1712 …return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /… in NVIC_GetPendingIRQ()
1722 __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) in NVIC_SetPendingIRQ() argument
1724 …NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ in NVIC_SetPendingIRQ()
1734 __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) in NVIC_ClearPendingIRQ() argument
1736 …NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt… in NVIC_ClearPendingIRQ()
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/device/google/contexthub/firmware/os/platform/stm32/inc/plat/
Dspi.h82 const enum IRQn spiRxIrq(uint8_t busId);
83 const enum IRQn spiTxIrq(uint8_t busId);
Ddma.h60 const enum IRQn dmaIrq(uint8_t busId, uint8_t stream);
Dcmsis.h30 typedef enum IRQn enum
/device/google/contexthub/firmware/os/platform/stm32/
DhostIntf.c47 enum IRQn rx, tx; in platHostIntfInit()
Ddma.c132 static const enum IRQn STM_DMA_IRQ[STM_DMA_NUM_DEVS][STM_DMA_NUM_STREAMS] = {
299 const enum IRQn dmaIrq(uint8_t busId, uint8_t stream) in dmaIrq()
Dspi.c627 const enum IRQn spiRxIrq(uint8_t busId) in spiRxIrq()
637 const enum IRQn spiTxIrq(uint8_t busId) in spiTxIrq()