Searched refs:MASK0 (Results 1 – 5 of 5) sorted by relevance
83 #define MASK0(n,p) (~MASK1(n,p)) macro90 #define SET_OPCODE(i,o) ((i) = (((i)&MASK0(SIZE_OP,POS_OP)) | \94 #define setarg(i,v,pos,size) ((i) = (((i)&MASK0(size,pos)) | \
772 …__IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 … member
752 …__IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 … member
812 …__IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 … member
993 …__IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 … member