1 /** @file 2 Main Header file for the MMC DXE driver 3 4 Copyright (c) 2011-2015, ARM Limited. All rights reserved. 5 6 This program and the accompanying materials 7 are licensed and made available under the terms and conditions of the BSD License 8 which accompanies this distribution. The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 #ifndef __MMC_H 17 #define __MMC_H 18 19 #include <Uefi.h> 20 21 #include <Protocol/DiskIo.h> 22 #include <Protocol/BlockIo.h> 23 #include <Protocol/EraseBlock.h> 24 #include <Protocol/DevicePath.h> 25 #include <Protocol/MmcHost.h> 26 27 #include <Library/UefiLib.h> 28 #include <Library/DebugLib.h> 29 #include <Library/UefiBootServicesTableLib.h> 30 31 #define MMC_TRACE(txt) DEBUG((EFI_D_BLKIO, "MMC: " txt "\n")) 32 33 #define MMC_IOBLOCKS_READ 0 34 #define MMC_IOBLOCKS_WRITE 1 35 36 #define MMC_OCR_POWERUP 0x80000000 37 38 #define MMC_CSD_GET_CCC(Response) (Response[2] >> 20) 39 #define MMC_CSD_GET_TRANSPEED(Response) (Response[3] & 0xFF) 40 #define MMC_CSD_GET_READBLLEN(Response) ((Response[2] >> 16) & 0xF) 41 #define MMC_CSD_GET_WRITEBLLEN(Response) ((Response[0] >> 22) & 0xF) 42 #define MMC_CSD_GET_FILEFORMAT(Response) ((Response[0] >> 10) & 0x3) 43 #define MMC_CSD_GET_FILEFORMATGRP(Response) ((Response[0] >> 15) & 0x1) 44 #define MMC_CSD_GET_DEVICESIZE(csd) (((Response[1] >> 30) & 0x3) | ((Response[2] & 0x3FF) << 2)) 45 #define HC_MMC_CSD_GET_DEVICESIZE(Response) ((Response[1] >> 16) | ((Response[2] & 0x40) << 16)); 46 #define MMC_CSD_GET_DEVICESIZEMULT(csd) ((Response[1] >> 15) & 0x7) 47 48 #define MMC_R0_READY_FOR_DATA (1 << 8) 49 50 #define MMC_R0_CURRENTSTATE(Response) ((Response[0] >> 9) & 0xF) 51 52 #define MMC_R0_STATE_IDLE 0 53 #define MMC_R0_STATE_READY 1 54 #define MMC_R0_STATE_IDENT 2 55 #define MMC_R0_STATE_STDBY 3 56 #define MMC_R0_STATE_TRAN 4 57 #define MMC_R0_STATE_DATA 5 58 59 typedef enum { 60 UNKNOWN_CARD, 61 MMC_CARD, //MMC card 62 MMC_CARD_HIGH, //MMC Card with High capacity 63 EMMC_CARD, //eMMC 4.41 card 64 SD_CARD, //SD 1.1 card 65 SD_CARD_2, //SD 2.0 or above standard card 66 SD_CARD_2_HIGH //SD 2.0 or above high capacity card 67 } CARD_TYPE; 68 69 typedef struct { 70 UINT32 Reserved0: 7; // 0 71 UINT32 V170_V195: 1; // 1.70V - 1.95V 72 UINT32 V200_V260: 7; // 2.00V - 2.60V 73 UINT32 V270_V360: 9; // 2.70V - 3.60V 74 UINT32 RESERVED_1: 5; // Reserved 75 UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode) 76 UINT32 PowerUp: 1; // This bit is set to LOW if the card has not finished the power up routine 77 } OCR; 78 79 /* For little endian CPU */ 80 typedef struct { 81 UINT8 SD_SPEC: 4; // SD Memory Card - Spec. Version [59:56] 82 UINT8 SCR_STRUCTURE: 4; // SCR Structure [63:60] 83 UINT8 SD_BUS_WIDTHS: 4; // DAT Bus widths supported [51:48] 84 UINT8 DATA_STAT_AFTER_ERASE: 1; // Data Status after erases [55] 85 UINT8 SD_SECURITY: 3; // CPRM Security Support [54:52] 86 UINT8 EX_SECURITY_1: 1; // Extended Security Support [43] 87 UINT8 SD_SPEC4: 1; // Spec. Version 4.00 or higher [42] 88 UINT8 RESERVED_1: 2; // Reserved [41:40] 89 UINT8 SD_SPEC3: 1; // Spec. Version 3.00 or higher [47] 90 UINT8 EX_SECURITY_2: 3; // Extended Security Support [46:44] 91 UINT8 CMD_SUPPORT: 4; // Command Support bits [35:32] 92 UINT8 RESERVED_2: 4; // Reserved [39:36] 93 UINT32 RESERVED_3; // Manufacturer Usage [31:0] 94 } SCR; 95 96 typedef struct { 97 UINT32 NOT_USED; // 1 [0:0] 98 UINT32 CRC; // CRC7 checksum [7:1] 99 UINT32 MDT; // Manufacturing date [19:8] 100 UINT32 RESERVED_1; // Reserved [23:20] 101 UINT32 PSN; // Product serial number [55:24] 102 UINT8 PRV; // Product revision [63:56] 103 UINT8 PNM[5]; // Product name [64:103] 104 UINT16 OID; // OEM/Application ID [119:104] 105 UINT8 MID; // Manufacturer ID [127:120] 106 } CID; 107 108 typedef struct { 109 UINT8 NOT_USED: 1; // Not used, always 1 [0:0] 110 UINT8 CRC: 7; // CRC [7:1] 111 112 UINT8 RESERVED_1: 2; // Reserved [9:8] 113 UINT8 FILE_FORMAT: 2; // File format [11:10] 114 UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] 115 UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] 116 UINT8 COPY: 1; // Copy flag (OTP) [14:14] 117 UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] 118 119 UINT16 RESERVED_2: 5; // Reserved [20:16] 120 UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] 121 UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] 122 UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] 123 UINT16 RESERVED_3: 2; // Reserved [30:29] 124 UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] 125 126 UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32] 127 UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39] 128 UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46] 129 UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47] 130 UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50] 131 UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53] 132 UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56] 133 UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59] 134 UINT32 C_SIZELow2: 2; // Device size [63:62] 135 136 UINT32 C_SIZEHigh10: 10;// Device size [73:64] 137 UINT32 RESERVED_4: 2; // Reserved [75:74] 138 UINT32 DSR_IMP: 1; // DSR implemented [76:76] 139 UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] 140 UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] 141 UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] 142 UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80] 143 UINT32 CCC: 12;// Card command classes [95:84] 144 145 UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] 146 UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] 147 UINT8 TAAC ; // Data read access-time 1 [119:112] 148 149 UINT8 RESERVED_5: 2; // Reserved [121:120] 150 UINT8 SPEC_VERS: 4; // System specification version [125:122] 151 UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] 152 } CSD; 153 154 typedef struct { 155 UINT8 RESERVED_1[16]; // Reserved [15:0] 156 UINT8 SECURE_REMOVAL_TYPE; // Secure Removal Type [16:16] 157 UINT8 PRODUCT_STATE_AWARENESS_ENABLEMENT; // Product state awareness enablement [17:17] 158 UINT8 MAX_PRE_LOADING_DATA_SIZE[4]; // MAX pre loading data size [21:18] 159 UINT8 PRE_LOADING_DATA_SIZE[4]; // Pre loading data size [25:22] 160 UINT8 FFU_STATUS; // FFU Status [26:26] 161 UINT8 RESERVED_2[2]; // Reserved [28:27] 162 UINT8 MODE_OPERATION_CODES; // Mode operation codes [29:29] 163 UINT8 MODE_CONFIG; // Mode config [30:30] 164 UINT8 RESERVED_3; // Reserved [31:31] 165 UINT8 FLUSH_CACHE; // Flushing of the cache [32:32] 166 UINT8 CACHE_CTRL; // Control to turn the cache ON/OFF [33:33] 167 UINT8 POWER_OFF_NOTIFICATION; // Power Off Notification [34:34] 168 UINT8 PACKED_FAILURE_INDEX; // Packed command failure index [35:35] 169 UINT8 PACKED_COMMAND_STATUS; // Packed command status [36:36] 170 UINT8 CONTEXT_CONF[15]; // Context configuration [51:37] 171 UINT8 EXT_PARTITIONS_ATTRIBUTE[2]; // Extended partitions attribute [53:52] 172 UINT8 EXCEPTION_EVENTS_STATUS[2]; // Exception events status [55:54] 173 UINT8 EXCEPTION_EVENTS_CTRL[2]; // Exception events control [57:56] 174 UINT8 DYNCAP_NEEDED; // Number of addressed group to be released [58:58] 175 UINT8 CLASS_6_CTRL; // Class 6 commands control [59:59] 176 UINT8 INI_TIMEOUT_EMU; // 1st initialization after disabling sector size emulation [60:60] 177 UINT8 DATA_SECTOR_SIZE; // Sector size [61:61] 178 UINT8 USE_NATIVE_SECTOR; // Sector size emulation [62:62] 179 UINT8 NATIVE_SECTOR_SIZE; // Native sector size [63:63] 180 UINT8 VENDOR_SPECIFIC_FIELD[64]; // Vendor specific fields [127:64] 181 UINT8 RESERVED_4[2]; // Reserved [129:128] 182 UINT8 PROGRAM_CID_CSD_DDR_SUPPORT; // Program CID/CSD in DDR mode support [130:130] 183 UINT8 PERIODIC_WAKEUP; // Periodic wake-up [131:131] 184 UINT8 TCASE_SUPPORT; // Package case temperature is controlled [132:132] 185 UINT8 PRODUCTION_STATE_AWARENESS; // Production state awareness [133:133] 186 UINT8 SEC_BAD_BLK_MGMNT; // Bad block management mode [134:134] 187 UINT8 RESERVED_5; // Reserved [135:135] 188 UINT8 ENH_START_ADDR[4]; // Enhanced user data start address [139:136] 189 UINT8 ENH_SIZE_MULT[3]; // Enhanced user data area size [142:140] 190 UINT8 GP_SIZE_MULT[12]; // General purpose partition size [154:143] 191 UINT8 PARTITION_SETTING_COMPLETED; // Partitioning setting [155:155] 192 UINT8 PARTITIONS_ATTRIBUTE; // Partitions attribute [156:156] 193 UINT8 MAX_ENH_SIZE_MULT[3]; // Max enhanced area size [159:157] 194 UINT8 PARTITIONING_SUPPORT; // Partitioning [160:160] 195 UINT8 HPI_MGMT; // HPI management [161:161] 196 UINT8 RST_N_FUNCTION; // H/W reset function [162:162] 197 UINT8 BKOPS_EN; // Enable background operations handshake [163:163] 198 UINT8 BKOPS_START; // Manually start background operations [164:164] 199 UINT8 SANITIZE_START; // Start sanitize operation [165:165] 200 UINT8 WR_REL_PARAM; // Write reliability parameter register [166:166] 201 UINT8 WR_REL_SET; // Write reliability setting register [167:167] 202 UINT8 RPMB_SIZE_MULT; // RPMB size [168:168] 203 UINT8 FW_CONFIG; // FW configuration [169:169] 204 UINT8 RESERVED_6; // Reserved [170:170] 205 UINT8 USER_WP; // User area write protection register [171:171] 206 UINT8 RESERVED_7; // Reserved [172:172] 207 UINT8 BOOT_WP; // Boot area write protection register [173:173] 208 UINT8 BOOT_WP_STATUS; // Boot write protection register [174:174] 209 UINT8 ERASE_GROUP_DEF; // High-density erase group definition [175:175] 210 UINT8 RESERVED_8; // Reserved [176:176] 211 UINT8 BOOT_BUS_CONDITIONS; // Boot bus conditions [177:177] 212 UINT8 BOOT_CONFIG_PROT; // Boot config protection [178:178] 213 UINT8 PARTITION_CONFIG; // Partition config [179:179] 214 UINT8 RESERVED_9; // Reserved [180:180] 215 UINT8 ERASED_MEM_CONT; // Erased memory content [181:181] 216 UINT8 RESERVED_10; // Reserved [182:182] 217 UINT8 BUS_WIDTH; // Bus width mode [183:183] 218 UINT8 RESERVED_11; // Reserved [184:184] 219 UINT8 HS_TIMING; // High-speed interface timing [185:185] 220 UINT8 RESERVED_12; // Reserved [186:186] 221 UINT8 POWER_CLASS; // Power class [187:187] 222 UINT8 RESERVED_13; // Reserved [188:188] 223 UINT8 CMD_SET_REV; // Command set revision [189:189] 224 UINT8 RESERVED_14; // Reserved [190:190] 225 UINT8 CMD_SET; // Command set [191:191] 226 UINT8 EXT_CSD_REV; // Extended CSD revision [192:192] 227 UINT8 RESERVED_15; // Reserved [193:193] 228 UINT8 CSD_STRUCTURE; // CSD Structure [194:194] 229 UINT8 RESERVED_16; // Reserved [195:195] 230 UINT8 DEVICE_TYPE; // Device type [196:196] 231 UINT8 DRIVER_STRENGTH; // I/O Driver strength [197:197] 232 UINT8 OUT_OF_INTERRUPT_TIME; // Out-of-interrupt busy timing [198:198] 233 UINT8 PARTITION_SWITCH_TIME; // Partition switching timing [199:199] 234 UINT8 PWR_CL_52_195; // Power class for 52MHz at 1.95V 1 R [200:200] 235 UINT8 PWR_CL_26_195; // Power class for 26MHz at 1.95V 1 R [201:201] 236 UINT8 PWR_CL_52_360; // Power class for 52MHz at 3.6V 1 R [202:202] 237 UINT8 PWR_CL_26_360; // Power class for 26MHz at 3.6V 1 R [203:203] 238 UINT8 RESERVED_17; // Reserved [204:204] 239 UINT8 MIN_PERF_R_4_26; // Minimum read performance for 4bit at 26MHz [205:205] 240 UINT8 MIN_PERF_W_4_26; // Minimum write performance for 4bit at 26MHz [206:206] 241 UINT8 MIN_PERF_R_8_26_4_52; // Minimum read performance for 8bit at 26MHz, for 4bit at 52MHz [207:207] 242 UINT8 MIN_PERF_W_8_26_4_52; // Minimum write performance for 8bit at 26MHz, for 4bit at 52MHz [208:208] 243 UINT8 MIN_PERF_R_8_52; // Minimum read performance for 8bit at 52MHz [209:209] 244 UINT8 MIN_PERF_W_8_52; // Minimum write performance for 8bit at 52MHz [210:210] 245 UINT8 RESERVED_18; // Reserved [211:211] 246 UINT32 SEC_COUNT; // Sector count [215:212] 247 UINT8 SLEEP_NOTIFICATION_TIME; // Sleep notification timout [216:216] 248 UINT8 S_A_TIMEOUT; // Sleep/awake timeout [217:217] 249 UINT8 PRODUCTION_STATE_AWARENESS_TIMEOUT; // Production state awareness timeout [218:218] 250 UINT8 S_C_VCCQ; // Sleep current (VCCQ) [219:219] 251 UINT8 S_C_VCC; // Sleep current (VCC) [220:220] 252 UINT8 HC_WP_GRP_SIZE; // High-capacity write protect group size [221:221] 253 UINT8 REL_WR_SEC_C; // Reliable write sector count [222:222] 254 UINT8 ERASE_TIMEOUT_MULT; // High-capacity erase timeout [223:223] 255 UINT8 HC_ERASE_GRP_SIZE; // High-capacity erase unit size [224:224] 256 UINT8 ACC_SIZE; // Access size [225:225] 257 UINT8 BOOT_SIZE_MULTI; // Boot partition size [226:226] 258 UINT8 RESERVED_19; // Reserved [227:227] 259 UINT8 BOOT_INFO; // Boot information [228:228] 260 UINT8 SEC_TRIM_MULT; // Secure TRIM Multiplier [229:229] 261 UINT8 SEC_ERASE_MULT; // Secure Erase Multiplier [230:230] 262 UINT8 SEC_FEATURE_SUPPORT; // Secure Feature Support [231:231] 263 UINT8 TRIM_MULT; // TRIM Multiplier [232:232] 264 UINT8 RESERVED_20; // Reserved [233:233] 265 UINT8 MIN_PREF_DDR_R_8_52; // Minimum read performance for 8bit at 52MHz in DDR mode [234:234] 266 UINT8 MIN_PREF_DDR_W_8_52; // Minimum write performance for 8bit at 52MHz in DDR mode [235:235] 267 UINT8 PWR_CL_200_130; // Power class for 200MHz at VCCQ=1.3V, VCC=3.6V [236:236] 268 UINT8 PWR_CL_200_195; // Power class for 200MHz at VCCQ=1.95V, VCC=3.6V [237:237] 269 UINT8 PWR_CL_DDR_52_195; // Power class for 52MHz, DDR at 1.95V [238:238] 270 UINT8 PWR_CL_DDR_52_360; // Power class for 52Mhz, DDR at 3.6V [239:239] 271 UINT8 RESERVED_21; // Reserved [240:240] 272 UINT8 INI_TIMEOUT_AP; // 1st initialization time after partitioning [241:241] 273 UINT8 CORRECTLY_PRG_SECTORS_NUM[4]; // Number of correctly programmed sectors [245:242] 274 UINT8 BKOPS_STATUS; // Background operations status [246:246] 275 UINT8 POWER_OFF_LONG_TIME; // Power off notification (long) timeout [247:247] 276 UINT8 GENERIC_CMD6_TIME; // Generic CMD6 timeout [248:248] 277 UINT8 CACHE_SIZE[4]; // Cache size [252:249] 278 UINT8 PWR_CL_DDR_200_360; // Power class for 200MHz, DDR at VCC=3.6V [253:253] 279 UINT8 FIRMWARE_VERSION[8]; // Firmware version [261:254] 280 UINT8 DEVICE_VERSION[2]; // Device version [263:262] 281 UINT8 OPTIMAL_TRIM_UNIT_SIZE; // Optimal trim unit size [264:264] 282 UINT8 OPTIMAL_WRITE_SIZE; // Optimal write size [265:265] 283 UINT8 OPTIMAL_READ_SIZE; // Optimal read size [266:266] 284 UINT8 PRE_EOL_INFO; // Pre EOL information [267:267] 285 UINT8 DEVICE_LIFE_TIME_EST_TYP_A; // Device life time estimation type A [268:268] 286 UINT8 DEVICE_LIFE_TIME_EST_TYP_B; // Device life time estimation type B [269:269] 287 UINT8 VENDOR_PROPRIETARY_HEALTH_REPORT[32]; // Vendor proprietary health report [301:270] 288 UINT8 NUMBER_OF_FW_SECTORS_CORRECTLY_PROGRAMMED[4]; // Number of FW sectors correctly programmed [305:302] 289 UINT8 RESERVED_22[181]; // Reserved [486:306] 290 UINT8 FFU_ARG[4]; // FFU argument [490:487] 291 UINT8 OPERATION_CODE_TIMEOUT; // Operation codes timeout [491:491] 292 UINT8 FFU_FEATURES; // FFU features [492:492] 293 UINT8 SUPPORTED_MODES; // Supported modes [493:493] 294 UINT8 EXT_SUPPORT; // Extended partitions attribute support [494:494] 295 UINT8 LARGE_UNIT_SIZE_M1; // Large unit size [495:495] 296 UINT8 CONTEXT_CAPABILITIES; // Context management capabilities [496:496] 297 UINT8 TAG_RES_SIZE; // Tag resource size [497:497] 298 UINT8 TAG_UNIT_SIZE; // Tag unit size [498:498] 299 UINT8 DATA_TAG_SUPPORT; // Data tag support [499:499] 300 UINT8 MAX_PACKED_WRITES; // Max packed write commands [500:500] 301 UINT8 MAX_PACKED_READS; // Max packed read commands [501:501] 302 UINT8 BKOPS_SUPPORT; // Background operations support [502:502] 303 UINT8 HPI_FEATURES; // HPI features [503:503] 304 UINT8 S_CMD_SET; // Supported command sets [504:504] 305 UINT8 EXT_SECURITY_ERR; // Extended security commands error [505:505] 306 UINT8 RESERVED_23[6]; // Reserved [511:506] 307 } ECSD; 308 309 typedef struct { 310 UINT16 RCA; 311 CARD_TYPE CardType; 312 OCR OCRData; 313 CID CIDData; 314 CSD CSDData; 315 ECSD ECSDData; // MMC V4 extended card specific 316 } CARD_INFO; 317 318 typedef struct _MMC_HOST_INSTANCE { 319 UINTN Signature; 320 LIST_ENTRY Link; 321 EFI_HANDLE MmcHandle; 322 EFI_DEVICE_PATH_PROTOCOL *DevicePath; 323 324 MMC_STATE State; 325 EFI_BLOCK_IO_PROTOCOL BlockIo; 326 EFI_ERASE_BLOCK_PROTOCOL EraseBlockProtocol; 327 CARD_INFO CardInfo; 328 EFI_MMC_HOST_PROTOCOL *MmcHost; 329 330 BOOLEAN Initialized; 331 } MMC_HOST_INSTANCE; 332 333 #define MMC_HOST_INSTANCE_SIGNATURE SIGNATURE_32('m', 'm', 'c', 'h') 334 #define MMC_HOST_INSTANCE_FROM_BLOCK_IO_THIS(a) CR (a, MMC_HOST_INSTANCE, BlockIo, MMC_HOST_INSTANCE_SIGNATURE) 335 #define MMC_HOST_INSTANCE_FROM_LINK(a) CR (a, MMC_HOST_INSTANCE, Link, MMC_HOST_INSTANCE_SIGNATURE) 336 337 338 EFI_STATUS 339 EFIAPI 340 MmcGetDriverName ( 341 IN EFI_COMPONENT_NAME_PROTOCOL *This, 342 IN CHAR8 *Language, 343 OUT CHAR16 **DriverName 344 ); 345 346 EFI_STATUS 347 EFIAPI 348 MmcGetControllerName ( 349 IN EFI_COMPONENT_NAME_PROTOCOL *This, 350 IN EFI_HANDLE ControllerHandle, 351 IN EFI_HANDLE ChildHandle OPTIONAL, 352 IN CHAR8 *Language, 353 OUT CHAR16 **ControllerName 354 ); 355 356 extern EFI_COMPONENT_NAME_PROTOCOL gMmcComponentName; 357 extern EFI_COMPONENT_NAME2_PROTOCOL gMmcComponentName2; 358 359 extern EFI_DRIVER_DIAGNOSTICS2_PROTOCOL gMmcDriverDiagnostics2; 360 361 extern LIST_ENTRY mMmcHostPool; 362 363 /** 364 Reset the block device. 365 366 This function implements EFI_BLOCK_IO_PROTOCOL.Reset(). 367 It resets the block device hardware. 368 ExtendedVerification is ignored in this implementation. 369 370 @param This Indicates a pointer to the calling context. 371 @param ExtendedVerification Indicates that the driver may perform a more exhaustive 372 verification operation of the device during reset. 373 374 @retval EFI_SUCCESS The block device was reset. 375 @retval EFI_DEVICE_ERROR The block device is not functioning correctly and could not be reset. 376 377 **/ 378 EFI_STATUS 379 EFIAPI 380 MmcReset ( 381 IN EFI_BLOCK_IO_PROTOCOL *This, 382 IN BOOLEAN ExtendedVerification 383 ); 384 385 /** 386 Reads the requested number of blocks from the device. 387 388 This function implements EFI_BLOCK_IO_PROTOCOL.ReadBlocks(). 389 It reads the requested number of blocks from the device. 390 All the blocks are read, or an error is returned. 391 392 @param This Indicates a pointer to the calling context. 393 @param MediaId The media ID that the read request is for. 394 @param Lba The starting logical block address to read from on the device. 395 @param BufferSize The size of the Buffer in bytes. 396 This must be a multiple of the intrinsic block size of the device. 397 @param Buffer A pointer to the destination buffer for the data. The caller is 398 responsible for either having implicit or explicit ownership of the buffer. 399 400 @retval EFI_SUCCESS The data was read correctly from the device. 401 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the read operation. 402 @retval EFI_NO_MEDIA There is no media in the device. 403 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 404 @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of the intrinsic block size of the device. 405 @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid, 406 or the buffer is not on proper alignment. 407 408 **/ 409 EFI_STATUS 410 EFIAPI 411 MmcReadBlocks ( 412 IN EFI_BLOCK_IO_PROTOCOL *This, 413 IN UINT32 MediaId, 414 IN EFI_LBA Lba, 415 IN UINTN BufferSize, 416 OUT VOID *Buffer 417 ); 418 419 /** 420 Writes a specified number of blocks to the device. 421 422 This function implements EFI_BLOCK_IO_PROTOCOL.WriteBlocks(). 423 It writes a specified number of blocks to the device. 424 All blocks are written, or an error is returned. 425 426 @param This Indicates a pointer to the calling context. 427 @param MediaId The media ID that the write request is for. 428 @param Lba The starting logical block address to be written. 429 @param BufferSize The size of the Buffer in bytes. 430 This must be a multiple of the intrinsic block size of the device. 431 @param Buffer Pointer to the source buffer for the data. 432 433 @retval EFI_SUCCESS The data were written correctly to the device. 434 @retval EFI_WRITE_PROTECTED The device cannot be written to. 435 @retval EFI_NO_MEDIA There is no media in the device. 436 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 437 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the write operation. 438 @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of the intrinsic 439 block size of the device. 440 @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid, 441 or the buffer is not on proper alignment. 442 443 **/ 444 EFI_STATUS 445 EFIAPI 446 MmcWriteBlocks ( 447 IN EFI_BLOCK_IO_PROTOCOL *This, 448 IN UINT32 MediaId, 449 IN EFI_LBA Lba, 450 IN UINTN BufferSize, 451 IN VOID *Buffer 452 ); 453 454 /** 455 Flushes all modified data to a physical block device. 456 457 @param This Indicates a pointer to the calling context. 458 459 @retval EFI_SUCCESS All outstanding data were written correctly to the device. 460 @retval EFI_DEVICE_ERROR The device reported an error while attempting to write data. 461 @retval EFI_NO_MEDIA There is no media in the device. 462 463 **/ 464 EFI_STATUS 465 EFIAPI 466 MmcFlushBlocks ( 467 IN EFI_BLOCK_IO_PROTOCOL *This 468 ); 469 470 /** 471 Erase a specified number of device blocks. 472 473 This function implements EFI_ERASE_BLOCK_PROTOCOL.EraseBlocks(). 474 475 @param This Indicates a pointer to the calling context. 476 @param MediaId The media ID that the erase request is for. 477 @param Lba The starting logical block address to be erased. The caller is 478 responsible for erasing only legitimate locations. 479 @param Token A pointer to the token associated with the transaction. 480 @param Size The size in bytes to be erased. This must be a multiple of the 481 physical block size of the device. 482 483 @retval EFI_SUCCESS The erase request was queued if Event is not NULL. The data was 484 erased correctly to the device if the Event is NULL. 485 @retval EFI_WRITE_PROTECTED The device cannot be erased due to write protection. 486 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the erase operation. 487 @retval EFI_INVALID_PARAMETER The erase request contain LBAs that are not valid. 488 @retval EFI_NO_MEDIA There is no media in the device. 489 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 490 491 **/ 492 EFI_STATUS 493 EFIAPI 494 MmcEraseBlocks ( 495 IN EFI_BLOCK_IO_PROTOCOL *This, 496 IN UINT32 MediaId, 497 IN EFI_LBA Lba, 498 IN OUT EFI_ERASE_BLOCK_TOKEN *Token, 499 IN UINTN Size 500 ); 501 502 EFI_STATUS 503 MmcNotifyState ( 504 IN MMC_HOST_INSTANCE *MmcHostInstance, 505 IN MMC_STATE State 506 ); 507 508 EFI_STATUS 509 InitializeMmcDevice ( 510 IN MMC_HOST_INSTANCE *MmcHost 511 ); 512 513 VOID 514 EFIAPI 515 CheckCardsCallback ( 516 IN EFI_EVENT Event, 517 IN VOID *Context 518 ); 519 520 VOID 521 PrintCSD ( 522 IN UINT32* Csd 523 ); 524 525 VOID 526 PrintRCA ( 527 IN UINT32 Rca 528 ); 529 530 VOID 531 PrintOCR ( 532 IN UINT32 Ocr 533 ); 534 535 VOID 536 PrintResponseR1 ( 537 IN UINT32 Response 538 ); 539 540 VOID 541 PrintCID ( 542 IN UINT32* Cid 543 ); 544 545 #endif 546