| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/SP804TimerDxe/ |
| D | SP804Timer.c | 156 MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0); in ExitBootServicesEvent()
161 MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0); in ExitBootServicesEvent()
166 MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0); in ExitBootServicesEvent()
209 MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); in TimerDriverSetTimerPeriod()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/ |
| D | UartInit.c | 188 MmioAnd32(IO_BASE_ADDRESS + 0x0520, (UINT32)~(0x00000187)); in EnableInternalUart()
190 MmioAnd32(IO_BASE_ADDRESS + 0x0530, (UINT32)~(0x00000007)); in EnableInternalUart()
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| /device/linaro/bootloader/edk2/ArmPkg/Include/ |
| D | AsmMacroIoLib.h | 50 #define MmioAnd32(_Address, _AndData) \ macro
170 #define MmioAnd32(Address, AndData) \ macro
228 #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData macro
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| /device/linaro/bootloader/edk2/Omap35xxPkg/LcdGraphicsOutputDxe/ |
| D | LcdGraphicsOutputDxe.c | 148 MmioAnd32 (CM_FCLKEN_DSS, ~(EN_DSS1 | EN_DSS2 | EN_TV)); in DssSetMode()
180 MmioAnd32 (DISPC_CONFIG, CLEARLOADMODE); in DssSetMode()
241 MmioAnd32 (GPIO6_BASE + GPIO_OE, ~BIT10); in HwInitializeDisplay()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/LcdGraphicsOutputDxe/ |
| D | LcdGraphicsOutputDxe.c | 148 MmioAnd32 (CM_FCLKEN_DSS, ~(EN_DSS1 | EN_DSS2 | EN_TV)); in DssSetMode()
180 MmioAnd32 (DISPC_CONFIG, CLEARLOADMODE); in DssSetMode()
241 MmioAnd32 (GPIO6_BASE + GPIO_OE, ~BIT10); in HwInitializeDisplay()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
| D | ExI.c | 101 …MmioAnd32 ((UINTN) (GetPmcBase() + R_PCH_PMC_MTPMC1), ~((UINT32) BIT0+BIT1+BIT2)); //clear bit 0,1… in InitExI()
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| /device/linaro/bootloader/edk2/BeagleBoardPkg/Library/BeagleBoardLib/ |
| D | BeagleBoard.c | 94 MmioAnd32 (CM_FCLKEN_PER, 0xFFFFFFFF ^ CM_ICLKEN_PER_EN_GPT3_ENABLE ); in ArmPlatformInitialize()
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Library/BeagleBoardLib/ |
| D | BeagleBoard.c | 94 MmioAnd32 (CM_FCLKEN_PER, 0xFFFFFFFF ^ CM_ICLKEN_PER_EN_GPT3_ENABLE ); in ArmPlatformInitialize()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/MonoStatusCode/ |
| D | PlatformStatusCode.c | 356 MmioAnd32(IO_BASE_ADDRESS + 0x0520, (UINT32)~(0x00000187)); in EnableInternalUart()
358 MmioAnd32(IO_BASE_ADDRESS + 0x0530, (UINT32)~(0x00000007)); in EnableInternalUart()
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| D | PchAccess.h | 86 MmioAnd32 ( \
194 MmioAnd32 ( \
297 MmioAnd32 ( \
391 #define PchMmRcrb32And(Register, AndData) MmioAnd32 (PCH_RCRB_BASE + Register, AndDat…
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/ |
| D | PL111Lcd.c | 125 MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN); in LcdShutdown()
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| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| D | DebugCommunicationLibUsb.c | 291 MmioAnd32((UINTN)&DebugPortRegister->ControlStatus, (UINT32)~BIT4); in UsbDebugPortIn()
384 MmioAnd32((UINTN)&DebugPortRegister->ControlStatus, (UINT32)~0xF); in UsbDebugPortOut()
671 MmioAnd32((UINTN)PortStatus, (UINT32)~BIT8); in InitializeUsbDebugHardware()
972 MmioAnd32((UINTN)&UsbDebugPortRegister->ControlStatus, (UINT32)~BIT4); in DebugPortPollBuffer()
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| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/OmapDmaLib/ |
| D | OmapDmaLib.c | 171 MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE)); in DisableDmaChannel()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/OmapDmaLib/ |
| D | OmapDmaLib.c | 171 MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE)); in DisableDmaChannel()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformInitPei/ |
| D | PchInitPeim.c | 471 MmioAnd32 (IO_BASE_ADDRESS + 0x0520, ~(UINT32)0x07);
472 MmioAnd32 (IO_BASE_ADDRESS + 0x0530, ~(UINT32)0x07);
715 MmioAnd32 ((UINTN) (IoBase + 0x270), (UINT32) (~0x07));
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/SP805WatchdogDxe/ |
| D | SP805Watchdog.c | 80 MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); in SP805Stop()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MmcHostDxe/ |
| D | MmcHostDxe.c | 236 MmioAnd32 (MMCHS_SYSCTL, ~CEN); in UpdateMMCHSClkFrequency()
483 MmioAnd32 (MMCHS_CON, ~INIT); in MMCNotifyState()
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| /device/linaro/bootloader/edk2/Omap35xxPkg/MmcHostDxe/ |
| D | MmcHostDxe.c | 236 MmioAnd32 (MMCHS_SYSCTL, ~CEN); in UpdateMMCHSClkFrequency()
483 MmioAnd32 (MMCHS_CON, ~INIT); in MMCNotifyState()
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ |
| D | ArmVExpressSysConfig.c | 76 MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE); in AccessSysCfgRegister()
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ |
| D | ArmVExpressSysConfigRuntimeLib.c | 83 MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE); in AccessSysCfgRegister()
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| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbHostDxe/ |
| D | DwUsbHostDxe.c | 289 MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | in DwHcReset()
427 MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~DWC2_HPRT0_PRTRST); in DwHcSetRootHubPortFeature()
480 MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~DWC2_HPRT0_PRTRST); in DwHcClearRootHubPortFeature()
892 MmioAnd32 (DwHc->DwUsbBase + GOTGCTL, ~(DWC2_GOTGCTL_HSTSETHNPEN)); in DwHcInit()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MMCHSDxe/ |
| D | MMCHS.c | 96 MmioAnd32 (MMCHS_SYSCTL, ~CEN); in UpdateMMCHSClkFrequency()
409 MmioAnd32 (MMCHS_CON, ~INIT); in PerformCardIdenfication()
561 MmioAnd32 (MMCHS_CON, ~OD); in PerformCardIdenfication()
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| /device/linaro/bootloader/edk2/Omap35xxPkg/MMCHSDxe/ |
| D | MMCHS.c | 96 MmioAnd32 (MMCHS_SYSCTL, ~CEN); in UpdateMMCHSClkFrequency()
409 MmioAnd32 (MMCHS_CON, ~INIT); in PerformCardIdenfication()
561 MmioAnd32 (MMCHS_CON, ~OD); in PerformCardIdenfication()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciExpressLib/ |
| D | PciLib.c | 918 return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData); in PciExpressAnd32()
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| /device/linaro/bootloader/edk2/Omap35xxPkg/PciEmulation/ |
| D | PciEmulation.c | 80 MmioAnd32 (GPIO5_BASE + GPIO_OE, ~BIT19); in ConfigureUSBHost()
|