Searched refs:NUM_BYTE_LANES (Results 1 – 4 of 4) sorted by relevance
26 #define NUM_BYTE_LANES 4 // number of byte lanes per channel macro64 uint32_t rcvn[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];65 uint32_t rdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];66 uint32_t wdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];67 uint32_t wdq [NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];68 uint32_t vref[NUM_CHANNELS][NUM_BYTE_LANES];
538 for (bl_grp_i=0; bl_grp_i<((NUM_BYTE_LANES/bl_divisor)/2); bl_grp_i++) { in ddrphy_init()757 for (bl_grp_i=0; bl_grp_i<((NUM_BYTE_LANES/bl_divisor)/2); bl_grp_i++) { in ddrphy_init()779 for (bl_grp_i=0; bl_grp_i<((NUM_BYTE_LANES/bl_divisor)/2); bl_grp_i++) { in ddrphy_init()801 for (bl_grp_i=0; bl_grp_i<((NUM_BYTE_LANES/bl_divisor)/2); bl_grp_i++) { in ddrphy_init()831 for (bl_grp_i=0; bl_grp_i<((NUM_BYTE_LANES/bl_divisor)/2); bl_grp_i++) { in ddrphy_init()1085 …uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; // used to find placement for rank2rank sharin… in rcvn_cal()1094 uint32_t delay[NUM_BYTE_LANES]; // absolute PI value to be programmed on the byte lane in rcvn_cal()1130 for (bl_i=0; bl_i<(NUM_BYTE_LANES/bl_divisor); bl_i++) in rcvn_cal()1136 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i += 2) in rcvn_cal()1142 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i++) in rcvn_cal()[all …]
837 for (bl_i = 0; bl_i < NUM_BYTE_LANES; bl_i++) in clear_pointers()891 bool direction[NUM_BYTE_LANES]; // direction indicator in find_rising_edge()909 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i++) in find_rising_edge()931 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i++) in find_rising_edge()1005 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i++) in find_rising_edge()1083 for (bl_grp = 0; bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; bl_grp++) in sample_dqs()1165 for (j = 0; j < MAX_BYTE_LANES; j += NUM_BYTE_LANES) in byte_lane_mask()1167 ret_val |= (1 << ((j / NUM_BYTE_LANES) * NUM_BYTE_LANES)); in byte_lane_mask()1373 for (bl_i = 0; bl_i < (NUM_BYTE_LANES / bl_divisor); bl_i++) in print_timings()1501 for (bl = 0; bl < NUM_BYTE_LANES; bl++) in store_timings()[all …]
469 #define DDRIODQ_CH_OFFSET ((NUM_BYTE_LANES/2) * DDRIODQ_BL_OFFSET)