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Searched refs:PAGE_ATTRIBUTE_BITS (Results 1 – 5 of 5) sorted by relevance

/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/X64/
DSmmProfileArch.c54 *PTEntry = Pages | PAGE_ATTRIBUTE_BITS; in InitSmmS3Cr3()
120 *Uplink = Address | PAGE_ATTRIBUTE_BITS; in AcquirePage()
245 PageTable[Index] = Address | PAGE_ATTRIBUTE_BITS; in RestorePageTableAbove4G()
247 PageTable[Index] = PageTable[Index] & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); in RestorePageTableAbove4G()
265 PageTable[PTIndex] = PageTable[PTIndex] & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); in RestorePageTableAbove4G()
292 PageTable[PTIndex] |= (UINT64)(PAGE_ATTRIBUTE_BITS); in RestorePageTableAbove4G()
DPageTbl.c130 *PTEntry = Pages + PAGE_ATTRIBUTE_BITS; in SmmInitPageTable()
594 PageTable[PTIndex] = AllocPage () | PAGE_ATTRIBUTE_BITS; in SmiDefaultPFHandler()
624 PageAttribute | IA32_PG_A | PAGE_ATTRIBUTE_BITS; in SmiDefaultPFHandler()
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/
DMpService.c790 …PAGE_SIZE * (Index + 1) + (Is32BitPageTable ? IA32_PAE_PDPTE_ATTRIBUTE_BITS : PAGE_ATTRIBUTE_BITS); in Gen4GPageTable()
798 Pte[Index] = (Index << 21) | IA32_PG_PS | PAGE_ATTRIBUTE_BITS; in Gen4GPageTable()
807 Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | PAGE_ATTRIBUTE_BITS; in Gen4GPageTable()
824 Pte[Index] = PageAddress | PAGE_ATTRIBUTE_BITS; in Gen4GPageTable()
891 PageTable[PTIndex] = ((UINTN)NewPageTableAddress & gPhyMask) | PAGE_ATTRIBUTE_BITS; in SetCacheability()
DSmmProfile.c560 Pt[Level4] = Address + ((Level4 << 12) | PAGE_ATTRIBUTE_BITS); in InitPaging()
562 *Pte = (UINTN)Pt | PAGE_ATTRIBUTE_BITS; in InitPaging()
611 *Pte = *Pte & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); in InitPaging()
624 *Pt = *Pt & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); in InitPaging()
1247 PageTable[PTIndex] |= (UINT64)PAGE_ATTRIBUTE_BITS; in RestorePageTableBelow4G()
1280 PageTable[PTIndex] |= (UINT64)PAGE_ATTRIBUTE_BITS; in RestorePageTableBelow4G()
DPiSmmCpuDxeSmm.h85 #define PAGE_ATTRIBUTE_BITS (IA32_PG_RW | IA32_PG_P) macro