Searched refs:POWER_MGMT_REGISTER_Q35 (Results 1 – 7 of 7) sorted by relevance
53 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in AcpiTimerLibConstructor()54 AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL); in AcpiTimerLibConstructor()109 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in InternalAcpiGetTimerTick()
55 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in AcpiTimerLibConstructor()56 AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL); in AcpiTimerLibConstructor()
57 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in AcpiTimerLibConstructor()
349 PmCmd = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET); in MiscInitialization()350 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in MiscInitialization()351 AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL); in MiscInitialization()390 POWER_MGMT_REGISTER_Q35 (ICH9_RCBA), in MiscInitialization()
192 PmBase = PciRead32 (POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE)) & in SmmControl2DxeEntryPoint()218 PciOr16 (POWER_MGMT_REGISTER_Q35 (ICH9_GEN_PMCON_1), in SmmControl2DxeEntryPoint()351 (UINT64)POWER_MGMT_REGISTER_Q35 (ICH9_GEN_PMCON_1), in OnS3SaveStateInstalled()
67 #define POWER_MGMT_REGISTER_Q35(Offset) \ macro
884 Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); in PciAcpiInitialization()