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Searched refs:RTSOff (Results 1 – 5 of 5) sorted by relevance

/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
DXhciReg.c282 ASSERT (Xhc->RTSOff != 0); in XhcReadRuntimeReg()
288 (UINT64) (Xhc->RTSOff + Offset), in XhcReadRuntimeReg()
318 ASSERT (Xhc->RTSOff != 0); in XhcWriteRuntimeReg()
324 (UINT64) (Xhc->RTSOff + Offset), in XhcWriteRuntimeReg()
DXhci.h227 UINT32 RTSOff; ///< Runtime Register Space Offset member
DXhci.c1827 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET); in XhcCreateUsbHc()
1847 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff)); in XhcCreateUsbHc()
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/
DXhcPeim.h157 UINT32 RTSOff; ///< Runtime Register Space Offset member
DXhcPeim.c275 ASSERT (Xhc->RTSOff != 0); in XhcPeiReadRuntimeReg()
277 Data = MmioRead32 (Xhc->UsbHostControllerBaseAddress + Xhc->RTSOff + Offset); in XhcPeiReadRuntimeReg()
297 ASSERT (Xhc->RTSOff != 0); in XhcPeiWriteRuntimeReg()
299 MmioWrite32 (Xhc->UsbHostControllerBaseAddress + Xhc->RTSOff + Offset, Data); in XhcPeiWriteRuntimeReg()
1479 XhcDev->RTSOff = XhcPeiReadCapRegister (XhcDev, XHC_RTSOFF_OFFSET); in XhcPeimEntry()
1495 DEBUG ((EFI_D_INFO, "XhciPei: RTSOff: %x\n", XhcDev->RTSOff)); in XhcPeimEntry()