/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
D | QNCAccess.h | 23 #define EFI_LPC_PCI_ADDRESS( Register ) \ argument 24 …I_PCI_ADDRESS(PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, Register) 35 #define LpcPciCfg32( Register ) \ argument 36 QNCMmPci32(0,PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, Register ) 38 #define LpcPciCfg32Or( Register, OrData ) \ argument 39 QNCMmPci32Or( 0,PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, Register, OrData ) 41 #define LpcPciCfg32And( Register, AndData ) \ argument 42 QNCMmPci32And( 0,PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, Register, AndData ) 44 #define LpcPciCfg32AndThenOr( Register, AndData, OrData ) \ argument 45 …QNCMmPci32AndThenOr( 0,PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, Register, AndData, OrData… [all …]
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D | QNCCommonDefinitions.h | 108 #define QNCMmioAddress( BaseAddr, Register ) \ argument 110 (UINTN)(Register) \ 116 #define QNCMmio64Ptr( BaseAddr, Register ) \ argument 117 ( (volatile UINT64 *)QNCMmioAddress( BaseAddr, Register ) ) 119 #define QNCMmio64( BaseAddr, Register ) \ argument 120 *QNCMmio64Ptr( BaseAddr, Register ) 122 #define QNCMmio64Or( BaseAddr, Register, OrData ) \ argument 123 QNCMmio64( BaseAddr, Register ) = \ 125 QNCMmio64( BaseAddr, Register ) | \ 129 #define QNCMmio64And( BaseAddr, Register, AndData ) \ argument [all …]
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
D | VlvAccess.h | 36 #define MmioAddress( BaseAddr, Register ) \ argument 38 (UINTN)(Register) \ 46 #define Mmio32Ptr( BaseAddr, Register ) \ argument 47 ( (volatile UINT32 *)MmioAddress( BaseAddr, Register ) ) 49 #define Mmio32( BaseAddr, Register ) \ argument 50 *Mmio32Ptr( BaseAddr, Register ) 52 #define Mmio32Or( BaseAddr, Register, OrData ) \ argument 53 Mmio32( BaseAddr, Register ) = \ 55 Mmio32( BaseAddr, Register ) | \ 59 #define Mmio32And( BaseAddr, Register, AndData ) \ argument [all …]
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D | VlvCommonDefinitions.h | 118 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ argument 123 (UINTN)(Register) \ 130 #define MmPci64Ptr( Segment, Bus, Device, Function, Register ) \ argument 131 ( (volatile UINT64 *)MmPciAddress( Segment, Bus, Device, Function, Register ) ) 133 #define MmPci64( Segment, Bus, Device, Function, Register ) \ argument 134 *MmPci64Ptr( Segment, Bus, Device, Function, Register ) 136 #define MmPci64Or( Segment, Bus, Device, Function, Register, OrData ) \ argument 137 MmPci64( Segment, Bus, Device, Function, Register ) = \ 139 MmPci64( Segment, Bus, Device, Function, Register ) | \ 143 #define MmPci64And( Segment, Bus, Device, Function, Register, AndData ) \ argument [all …]
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
D | PchCommonDefinitions.h | 30 #define PchMmioAddress(BaseAddr, Register) ((UINTN) BaseAddr + (UINTN) (Register)) argument 35 #define PchMmio32Ptr(BaseAddr, Register) ((volatile UINT32 *) PchMmioAddress (BaseAddr, Register)) argument 37 #define PchMmio32(BaseAddr, Register) *PchMmio32Ptr (BaseAddr, Register) argument 39 #define PchMmio32Or(BaseAddr, Register, OrData) \ argument 40 PchMmio32 (BaseAddr, Register) = (UINT32) \ 41 (PchMmio32 (BaseAddr, Register) | (UINT32) (OrData)) 43 #define PchMmio32And(BaseAddr, Register, AndData) \ argument 44 PchMmio32 (BaseAddr, Register) = (UINT32) \ 45 (PchMmio32 (BaseAddr, Register) & (UINT32) (AndData)) 47 #define PchMmio32AndThenOr(BaseAddr, Register, AndData, OrData) \ argument [all …]
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D | PchAccess.h | 44 #define MmPciAddress(Segment, Bus, Device, Function, Register) \ argument 49 (UINTN) (Register) \ 66 #define PchAzaliaPciCfg32(Register) \ argument 72 Register) \ 75 #define PchAzaliaPciCfg32Or(Register, OrData) \ argument 81 Register), \ 85 #define PchAzaliaPciCfg32And(Register, AndData) \ argument 91 Register), \ 95 #define PchAzaliaPciCfg32AndThenOr(Register, AndData, OrData) \ argument 101 Register), \ [all …]
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
D | IohCommonDefinitions.h | 108 #define IohMmioAddress( BaseAddr, Register ) \ argument 110 (UINTN)(Register) \ 116 #define IohMmio64Ptr( BaseAddr, Register ) \ argument 117 ( (volatile UINT64 *)IohMmioAddress( BaseAddr, Register ) ) 119 #define IohMmio64( BaseAddr, Register ) \ argument 120 *IohMmio64Ptr( BaseAddr, Register ) 122 #define IohMmio64Or( BaseAddr, Register, OrData ) \ argument 123 IohMmio64( BaseAddr, Register ) = \ 125 IohMmio64( BaseAddr, Register ) | \ 129 #define IohMmio64And( BaseAddr, Register, AndData ) \ argument [all …]
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/ |
D | EfiCpuVersion.c | 54 EFI_CPUID_REGISTER Register; in EfiCpuVersion() 57 EfiCpuid (EFI_CPUID_VERSION_INFO, &Register); in EfiCpuVersion() 60 *SteppingId = (UINT8) (Register.RegEax & 0xF); in EfiCpuVersion() 64 *Processor = (UINT8) ((Register.RegEax >> 12) & 0x3); in EfiCpuVersion() 68 TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF); in EfiCpuVersion() 71 *Model = (UINT8) ((Register.RegEax >> 4) & 0xF); in EfiCpuVersion() 73 *Model = (UINT8) (*Model | ((Register.RegEax >> 12) & 0xF0)); in EfiCpuVersion() 80 *FamilyId = (UINT8 ) (*FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF)); in EfiCpuVersion()
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/ |
D | EfiCpuVersion.c | 44 EFI_CPUID_REGISTER Register; in EfiCpuVersion() local 47 EfiCpuid (EFI_CPUID_VERSION_INFO, &Register); in EfiCpuVersion() 50 *SteppingId = (UINT8) (Register.RegEax & 0xF); in EfiCpuVersion() 54 *Processor = (UINT8) ((Register.RegEax >> 12) & 0x3); in EfiCpuVersion() 58 TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF); in EfiCpuVersion() 61 *Model = (UINT8) ((Register.RegEax >> 4) & 0xF); in EfiCpuVersion() 63 *Model = (UINT8) (*Model | ((Register.RegEax >> 12) & 0xF0)); in EfiCpuVersion() 70 *FamilyId = (UINT8 ) (*FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF)); in EfiCpuVersion()
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/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Cpu0Cst/ |
D | Cpu0Cst.asl | 46 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}, 74 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 81 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, 88 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x30, 3)}, 95 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x50, 3)}, 112 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 119 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, 126 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x30, 3)}, 143 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x00, 1)}, 150 ResourceTemplate(){Register(FFixedHW, 1, 2, 0x10, 1)}, [all …]
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNC/ |
D | QNCSmmHelpers.c | 230 UINT64 Register; in ReadBitDesc() local 240 Register = 0; in ReadBitDesc() 262 Register = (UINT64) IoRead8 (PcdGet16 (PcdPm1blkIoBaseAddress) + BitDesc->Reg.Data.acpi); in ReadBitDesc() 266 Register = (UINT64) IoRead16 (PcdGet16 (PcdPm1blkIoBaseAddress) + BitDesc->Reg.Data.acpi); in ReadBitDesc() 270 Register = (UINT64) IoRead32 (PcdGet16 (PcdPm1blkIoBaseAddress) + BitDesc->Reg.Data.acpi); in ReadBitDesc() 281 if ((Register & LShiftU64 (BIT_ZERO, BitDesc->Bit)) != 0) { in ReadBitDesc() 305 …Register = (UINT64) IoRead8 ((UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF) + BitDesc->Reg.Dat… in ReadBitDesc() 309 …Register = (UINT64) IoRead16 ((UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF) + BitDesc->Reg.Da… in ReadBitDesc() 313 …Register = (UINT64) IoRead32 ((UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF) + BitDesc->Reg.Da… in ReadBitDesc() 324 if ((Register & LShiftU64 (BIT_ZERO, BitDesc->Bit)) != 0) { in ReadBitDesc() [all …]
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/X64/ |
D | PlatformIoLib.c | 33 UINT8 Register in GetPciAddress() argument 58 Data |= (UINT32) Register; in GetPciAddress() 69 UINT8 Register in PciRead8() argument 92 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead8() 115 UINT8 Register in PciRead16() argument 138 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead16() 161 UINT8 Register in PciRead32() argument 184 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead32() 207 UINT8 Register, in PciWrite8() argument 231 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciWrite8() [all …]
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/Ia32/ |
D | PlatformIoLib.c | 33 UINT8 Register in GetPciAddress() argument 56 Data |= (UINT32) Register; in GetPciAddress() 67 UINT8 Register in PciRead8() argument 90 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead8() 113 UINT8 Register in PciRead16() argument 136 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead16() 159 UINT8 Register in PciRead32() argument 182 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead32() 205 UINT8 Register, in PciWrite8() argument 229 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciWrite8() [all …]
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/device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/ArmV7/ |
D | ArmV7ArchTimerSupport.asm | 32 mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register) 36 mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register) 48 mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register) 52 mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register) 64 mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register) 68 mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register) 72 mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register) 76 mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register) 80 mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register) 84 mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register) [all …]
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D | ArmV7ArchTimerSupport.S | 52 mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register) 56 mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register) 68 mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register) 72 mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register) 84 mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register) 88 mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register) 92 mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register) 96 mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register) 100 mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register) 104 mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register) [all …]
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/device/linaro/bootloader/edk2/EmbeddedPkg/GdbStub/X64/ |
D | Processor.c | 549 OUT UINTN *Register in FindNextFreeDebugRegister() argument 557 *Register = 0; in FindNextFreeDebugRegister() 559 *Register = 1; in FindNextFreeDebugRegister() 561 *Register = 2; in FindNextFreeDebugRegister() 563 *Register = 3; in FindNextFreeDebugRegister() 588 IN UINTN Register, in EnableDebugRegister() argument 615 if (Register == 0) { in EnableDebugRegister() 620 } else if (Register == 1) { in EnableDebugRegister() 625 } else if (Register == 2) { in EnableDebugRegister() 630 } else if (Register == 3) { in EnableDebugRegister() [all …]
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/device/linaro/bootloader/edk2/EmbeddedPkg/Library/GdbDebugAgent/X64/ |
D | Processor.c | 549 OUT UINTN *Register in FindNextFreeDebugRegister() argument 557 *Register = 0; in FindNextFreeDebugRegister() 559 *Register = 1; in FindNextFreeDebugRegister() 561 *Register = 2; in FindNextFreeDebugRegister() 563 *Register = 3; in FindNextFreeDebugRegister() 588 IN UINTN Register, in EnableDebugRegister() argument 615 if (Register == 0) { in EnableDebugRegister() 620 } else if (Register == 1) { in EnableDebugRegister() 625 } else if (Register == 2) { in EnableDebugRegister() 630 } else if (Register == 3) { in EnableDebugRegister() [all …]
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/device/linaro/bootloader/edk2/EmbeddedPkg/GdbStub/Ia32/ |
D | Processor.c | 578 OUT UINTN *Register in FindNextFreeDebugRegister() argument 586 *Register = 0; in FindNextFreeDebugRegister() 588 *Register = 1; in FindNextFreeDebugRegister() 590 *Register = 2; in FindNextFreeDebugRegister() 592 *Register = 3; in FindNextFreeDebugRegister() 617 IN UINTN Register, in EnableDebugRegister() argument 644 if (Register == 0) { in EnableDebugRegister() 649 } else if (Register == 1) { in EnableDebugRegister() 654 } else if (Register == 2) { in EnableDebugRegister() 659 } else if (Register == 3) { in EnableDebugRegister() [all …]
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/device/linaro/bootloader/edk2/EmbeddedPkg/Library/GdbDebugAgent/Ia32/ |
D | Processor.c | 530 OUT UINTN *Register in FindNextFreeDebugRegister() argument 538 *Register = 0; in FindNextFreeDebugRegister() 540 *Register = 1; in FindNextFreeDebugRegister() 542 *Register = 2; in FindNextFreeDebugRegister() 544 *Register = 3; in FindNextFreeDebugRegister() 569 IN UINTN Register, in EnableDebugRegister() argument 596 if (Register == 0) { in EnableDebugRegister() 601 } else if (Register == 1) { in EnableDebugRegister() 606 } else if (Register == 2) { in EnableDebugRegister() 611 } else if (Register == 3) { in EnableDebugRegister() [all …]
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/ |
D | I2CAccess.h | 37 …efine PchLpcPciCfg8(Register) I2CLibPeiMmioRead8 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI… argument 42 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ argument 47 (UINTN)(Register) \
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/device/linaro/bootloader/edk2/Omap35xxPkg/TPS65950Dxe/ |
D | TPS65950.c | 32 IN UINTN Register, in Read() argument 42 SlaveAddress.SmbusDeviceAddress = EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(Register); in Read() 43 DeviceRegister = (UINT8)EXTERNAL_DEVICE_REGISTER_TO_REGISTER(Register); in Read() 59 IN UINTN Register, in Write() argument 70 SlaveAddress.SmbusDeviceAddress = EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(Register); in Write() 71 DeviceRegister = (UINT8)EXTERNAL_DEVICE_REGISTER_TO_REGISTER(Register); in Write()
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/device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/TPS65950Dxe/ |
D | TPS65950.c | 32 IN UINTN Register, in Read() argument 42 SlaveAddress.SmbusDeviceAddress = EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(Register); in Read() 43 DeviceRegister = (UINT8)EXTERNAL_DEVICE_REGISTER_TO_REGISTER(Register); in Read() 59 IN UINTN Register, in Write() argument 70 SlaveAddress.SmbusDeviceAddress = EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(Register); in Write() 71 DeviceRegister = (UINT8)EXTERNAL_DEVICE_REGISTER_TO_REGISTER(Register); in Write()
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/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
D | LegacyCmos.c | 70 UINT8 Register; in LegacyCalculateWriteStandardCmosChecksum() local 73 for (Checksum = 0, Register = 0x10; Register < 0x2e; Register++) { in LegacyCalculateWriteStandardCmosChecksum() 74 Checksum = (UINT16)(Checksum + LegacyReadStandardCmos (Register)); in LegacyCalculateWriteStandardCmosChecksum()
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
D | S3Save.c | 276 PciAddress.Register = ExtReg[Index]; 282 PciAddress.Register 308 PciAddress.Register = 0; 316 PciAddress.Register 333 PciAddress.Register = (UINT8)Offset; 334 …32 (MmPciAddress (0, PciAddress.Bus, PciAddress.Device, PciAddress.Function, PciAddress.Register));
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/VlvPlatformInitDxe/ |
D | IgdOpRegion.h | 114 #define IgdMmPci32(Register) MmPci32 (0, IGD_BUS, IGD_DEV, IGD_FUN_0, Register) 115 #define IgdMmPci16Or(Register, OrData) MmPci16Or (0, IGD_BUS, IGD_DEV, IGD_FUN_0, Register, OrData) 116 #define IgdMmPci16AndThenOr(Register,AndData,OrData) MmPci16AndThenOr (0, IGD_BUS, IGD_DEV, IGD_FUN…
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