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Searched refs:SCB_SHCSR_MEMFAULTENA_Pos (Results 1 – 4 of 4) sorted by relevance

/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
Dcore_cm3.h490 #define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB … macro
491 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB …
Dcore_sc300.h485 #define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB … macro
486 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB …
Dcore_cm4.h529 #define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB … macro
530 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB …
Dcore_cm7.h582 #define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB … macro
583 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB …