Searched refs:SCR (Results 1 – 15 of 15) sorted by relevance
245 SCB->SCR &=~ SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()248 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()251 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()255 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()259 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
229 SCB->SCR &=~ SCB_SCR_SLEEPONEXIT_Msk; in platInitialize()
107 }SCR; typedef
118 } SCR; typedef
108 SCR SCRRegister;
340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
355 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
346 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
354 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
401 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
416 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
94 } SCR; typedef
323 SCR Scr; in InitializeSdMmcDevice()
179 AArch64 by setting the `SCR.RW` bit.