1# 2# Copyright (c) 2011-2014, ARM Limited. All rights reserved. 3# 4# This program and the accompanying materials 5# are licensed and made available under the terms and conditions of the BSD License 6# which accompanies this distribution. The full text of the license may be found at 7# http://opensource.org/licenses/bsd-license.php 8# 9# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11# 12# 13 14#include <Chipset/AArch64.h> 15#include <AsmMacroIoLibV8.h> 16#include <Base.h> 17#include <AutoGen.h> 18 19.text 20 21//============================================================ 22//Default Exception Handlers 23//============================================================ 24 25#define TO_HANDLER \ 26 EL1_OR_EL2(x1) \ 271: mrs x1, elr_el1 /* EL1 Exception Link Register */ ;\ 28 b 3f ;\ 292: mrs x1, elr_el2 /* EL2 Exception Link Register */ ;\ 303: bl ASM_PFX(PeiCommonExceptionEntry) ; 31 32 33// 34// Default Exception handlers: There is no plan to return from any of these exceptions. 35// No context saving at all. 36// 37 38VECTOR_BASE(PeiVectorTable) 39 40VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC) 41_DefaultSyncExceptHandler_t: 42 mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 43 TO_HANDLER 44 45VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ) 46_DefaultIrq_t: 47 mov x0, #EXCEPT_AARCH64_IRQ 48 TO_HANDLER 49 50VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ) 51_DefaultFiq_t: 52 mov x0, #EXCEPT_AARCH64_FIQ 53 TO_HANDLER 54 55VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR) 56_DefaultSError_t: 57 mov x0, #EXCEPT_AARCH64_SERROR 58 TO_HANDLER 59 60VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC) 61_DefaultSyncExceptHandler_h: 62 mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 63 TO_HANDLER 64 65VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ) 66_DefaultIrq_h: 67 mov x0, #EXCEPT_AARCH64_IRQ 68 TO_HANDLER 69 70VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ) 71_DefaultFiq_h: 72 mov x0, #EXCEPT_AARCH64_FIQ 73 TO_HANDLER 74 75VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR) 76_DefaultSError_h: 77 mov x0, #EXCEPT_AARCH64_SERROR 78 TO_HANDLER 79 80VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC) 81_DefaultSyncExceptHandler_LowerA64: 82 mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 83 TO_HANDLER 84 85VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ) 86_DefaultIrq_LowerA64: 87 mov x0, #EXCEPT_AARCH64_IRQ 88 TO_HANDLER 89 90VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ) 91_DefaultFiq_LowerA64: 92 mov x0, #EXCEPT_AARCH64_FIQ 93 TO_HANDLER 94 95VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR) 96_DefaultSError_LowerA64: 97 mov x0, #EXCEPT_AARCH64_SERROR 98 TO_HANDLER 99 100VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC) 101_DefaultSyncExceptHandler_LowerA32: 102 mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 103 TO_HANDLER 104 105VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ) 106_DefaultIrq_LowerA32: 107 mov x0, #EXCEPT_AARCH64_IRQ 108 TO_HANDLER 109 110VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ) 111_DefaultFiq_LowerA32: 112 mov x0, #EXCEPT_AARCH64_FIQ 113 TO_HANDLER 114 115VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR) 116_DefaultSError_LowerA32: 117 mov x0, #EXCEPT_AARCH64_SERROR 118 TO_HANDLER 119 120VECTOR_END(PeiVectorTable) 121