/external/llvm/test/Analysis/BlockFrequencyInfo/ |
D | irreducible_loop_crash.ll | 12 for.inc: 17 br i1 %tobool7, label %for.inc.9, label %for.inc 19 for.inc.9: ; preds = %for.body.5 20 br i1 %tobool7, label %for.inc.9.1, label %for.inc 23 br i1 undef, label %for.end.17, label %for.inc 28 for.inc.9.1: ; preds = %for.inc.9 29 br i1 %tobool7, label %for.inc.9.2, label %for.inc 31 for.inc.9.2: ; preds = %for.inc.9.1 32 br i1 %tobool7, label %for.inc.9.3, label %for.inc 34 for.inc.9.3: ; preds = %for.inc.9.2 [all …]
|
D | double_exit.ll | 21 %I.0 = phi i32 [ 0, %entry ], [ %inc6, %outer.inc ] 22 %Return.0 = phi i32 [ 0, %entry ], [ %Return.1, %outer.inc ] 29 ; Pseudo-edges = outer.inc @ 1/5, exit @ 1/5 34 %Return.1 = phi i32 [ %Return.0, %outer ], [ %call4, %inner.inc ] 35 %J.0 = phi i32 [ %I.0, %outer ], [ %inc, %inner.inc ] 37 br i1 %cmp2, label %inner.body, label %outer.inc, !prof !1 ; 4:1 45 br i1 %tobool, label %exit, label %inner.inc, !prof !0 ; 3:1 49 ; CHECK-NEXT: inner.inc: float = 1.5, 50 inner.inc: 52 %inc = add nsw i32 %J.0, 1 [all …]
|
/external/llvm/test/MC/X86/AlignedBundling/ |
D | autogen-inst-offset-padding.s | 15 inc %eax 25 inc %eax 35 inc %eax 45 inc %eax 55 inc %eax 65 inc %eax 75 inc %eax 85 inc %eax 95 inc %eax 105 inc %eax [all …]
|
D | autogen-inst-offset-align-to-end.s | 15 inc %eax 26 inc %eax 37 inc %eax 48 inc %eax 59 inc %eax 70 inc %eax 81 inc %eax 92 inc %eax 103 inc %eax 114 inc %eax [all …]
|
/external/llvm/test/CodeGen/Hexagon/ |
D | hwloop4.ll | 24 %arrayidx.phi = phi i32* [ %arrayidx.inc.7, %for.body ], [ %C, %for.body.preheader9 ] 25 %i.05 = phi i32 [ %inc.7, %for.body ], [ 0, %for.body.preheader9 ] 27 %inc = add i32 %i.05, 1 28 %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1 29 store i32 %inc, i32* %arrayidx.inc, align 4 30 %inc.1 = add i32 %i.05, 2 31 %arrayidx.inc.1 = getelementptr i32, i32* %arrayidx.phi, i32 2 32 store i32 %inc.1, i32* %arrayidx.inc.1, align 4 33 %inc.2 = add i32 %i.05, 3 34 %arrayidx.inc.2 = getelementptr i32, i32* %arrayidx.phi, i32 3 [all …]
|
/external/llvm/test/Transforms/LoopVectorize/ |
D | iv_outside_user.ll | 14 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 15 %inc = add nsw i32 %inc.phi, 1 16 %cmp = icmp eq i32 %inc, %k 20 ret i32 %inc 37 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 38 %inc = add nsw i32 %inc.phi, 1 39 %cmp = icmp eq i32 %inc, %k 43 ret i32 %inc.phi 55 %inc.phi = phi i32 [ 32, %entry ], [ %inc, %for.body ] 56 %inc = sub nsw i32 %inc.phi, 2 [all …]
|
/external/clang/ |
D | Android.bp | 66 outs: ["clang/Driver/Options.inc"], 73 "clang/AST/AttrDump.inc", 74 "clang/AST/AttrImpl.inc", 75 "clang/AST/Attrs.inc", 76 "clang/AST/AttrVisitor.inc", 77 "clang/Basic/AttrHasAttributeImpl.inc", 78 "clang/Basic/AttrList.inc", 79 "clang/Parse/AttrParserStringSwitches.inc", 80 "clang/Sema/AttrParsedAttrImpl.inc", 81 "clang/Sema/AttrParsedAttrKinds.inc", [all …]
|
/external/aac/libSBRenc/src/ |
D | sbr_misc.cpp | 95 INT inc = 1; in FDKsbrEnc_Shellsort_fract() local 98 inc = 3 * inc + 1; in FDKsbrEnc_Shellsort_fract() 99 while (inc <= n); in FDKsbrEnc_Shellsort_fract() 102 inc = inc / 3; in FDKsbrEnc_Shellsort_fract() 103 for (i = inc + 1; i <= n; i++) { in FDKsbrEnc_Shellsort_fract() 106 while (in[j-inc-1] > v) { in FDKsbrEnc_Shellsort_fract() 107 in[j-1] = in[j-inc-1]; in FDKsbrEnc_Shellsort_fract() 108 j -= inc; in FDKsbrEnc_Shellsort_fract() 109 if (j <= inc) in FDKsbrEnc_Shellsort_fract() 114 } while (inc > 1); in FDKsbrEnc_Shellsort_fract() [all …]
|
/external/llvm/test/CodeGen/X86/ |
D | fma-intrinsics-phi-213-to-231.ll | 12 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 13 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 18 br label %for.inc 20 for.inc: 22 %inc = add nsw i32 %i.0, 1 38 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 39 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 44 br label %for.inc 46 for.inc: 48 %inc = add nsw i32 %i.0, 1 [all …]
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Makefile | 15 BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ 16 ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ 17 ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \ 18 ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ 19 ARMGenEDInfo.inc ARMGenFastISel.inc ARMGenMCCodeEmitter.inc \ 20 ARMGenMCPseudoLowering.inc ARMGenDisassemblerTables.inc
|
/external/llvm/test/Transforms/LICM/ |
D | speculate.ll | 14 for.body: ; preds = %entry, %for.inc 15 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] 19 br i1 %tobool, label %for.inc, label %if.then 25 br label %for.inc 27 for.inc: ; preds = %if.then, %for.body 28 %inc = add i64 %i.02, 1 29 %cmp = icmp slt i64 %inc, %n 32 for.end: ; preds = %for.inc, %entry 46 for.body: ; preds = %entry, %for.inc 47 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] [all …]
|
/external/apache-commons-math/src/main/java/org/apache/commons/math/dfp/ |
D | DfpDec.java | 215 final boolean inc; in round() 218 inc = false; in round() 222 inc = (n != 0) || (discarded != 0); // round up if n!=0 in round() 226 inc = n >= 5; // round half up in round() 230 inc = n > 5; // round half down in round() 234 inc = (n > 5) || in round() 240 inc = (n > 5) || in round() 246 inc = (sign == 1) && (n != 0 || discarded != 0); // round ceil in round() 251 inc = (sign == -1) && (n != 0 || discarded != 0); // round floor in round() 255 if (inc) { in round() [all …]
|
/external/llvm/test/Analysis/Delinearization/ |
D | multidim_only_ivs_3d_cast.ll | 25 %i = phi i64 [ %i.inc, %for.i.inc ], [ 0, %entry ] 29 %j = phi i64 [ %j.inc, %for.j.inc ], [ 0, %for.i ] 33 %k = phi i64 [ %k.inc, %for.k.inc ], [ 0, %for.j ] 43 br label %for.k.inc 45 for.k.inc: 46 %k.inc = add i64 %k, 1 47 %k.inc.trunc = trunc i64 %k.inc to i32 48 %k.exitcond = icmp eq i32 %k.inc.trunc, %o 49 br i1 %k.exitcond, label %for.j.inc, label %for.k 51 for.j.inc: [all …]
|
/external/valgrind/tests/ |
D | check_headers_and_includes | 219 foreach my $inc (get_included_files($path_name)) { 220 $inc = basename($inc); 222 if ($inc =~ /pub_core_/) { 223 error("File $path_name must not include $inc\n"); 226 if (($inc eq "valgrind.h") && ($path_name ne "include/pub_tool_clreq.h")) { 227 error("File $path_name should include pub_tool_clreq.h instead of $inc\n"); 249 foreach my $inc (get_included_files($path_name)) { 250 print "\tINCLUDE $inc\n" if ($debug); 252 if ($inc =~ /pub_tool_/) { 253 my $buddy = $inc; [all …]
|
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-shifted-sext.ll | 10 %inc = add i8 %a, 1 11 %conv1 = sext i8 %inc to i32 22 %inc = add i8 %a, 1 23 %conv1 = sext i8 %inc to i32 34 %inc = add i8 %a, 1 35 %conv1 = sext i8 %inc to i32 47 %inc = add i8 %a, 1 48 %conv1 = sext i8 %inc to i32 59 %inc = add i8 %a, 1 60 %conv = sext i8 %inc to i32 [all …]
|
/external/llvm/test/Analysis/ScalarEvolution/ |
D | infer-prestart-no-wrap.ll | 9 %counter = phi i32 [ 0, %entry ], [ %counter.inc, %loop ] 10 %idx = phi i32 [ %start, %entry ], [ %idx.inc, %loop ] 11 %idx.inc = add nsw i32 %idx, 1 12 %idx.inc.sext = sext i32 %idx.inc to i64 13 ; CHECK: %idx.inc.sext = sext i32 %idx.inc to i64 16 %buf.gep = getelementptr inbounds i32, i32* %buf, i32 %idx.inc 20 %counter.inc = add i32 %counter, 1 33 %counter = phi i32 [ 0, %entry ], [ %counter.inc, %loop ] 34 %idx = phi i32 [ %start, %entry ], [ %idx.inc, %loop ] 35 %idx.inc = add nuw i32 %idx, 1 [all …]
|
/external/llvm/test/Transforms/IndVarSimplify/ |
D | strengthen-overflow.ll | 11 %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] 12 %civ.inc = add i32 %civ, 1 13 ; CHECK: %civ.inc = add nsw i32 %civ, 1 14 %cmp = icmp slt i32 %civ.inc, %length 19 %check = icmp slt i32 %civ.inc, %length 23 ret i32 %civ.inc 37 %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] 38 %civ.inc = add i32 %civ, 1 39 ; CHECK: %civ.inc = add i32 %civ, 1 40 %cmp = icmp slt i32 %civ.inc, %length [all …]
|
D | pr20680.ll | 60 br i1 %cmp91.us.us, label %for.inc.lr.ph.us.us, label %for.cond2.loopexit.us.us 65 for.inc.lr.ph.us.us: ; preds = %cond.end.us.us 66 br label %for.inc.us.us 68 for.cond8.for.cond2.loopexit_crit_edge.us.us: ; preds = %for.inc.us.us 69 %inc.lcssa.us.us = phi i32 [ %inc.us.us, %for.inc.us.us ] 70 store i32 %inc.lcssa.us.us, i32* @b, align 4 73 for.inc.us.us: ; preds = %for.inc.us.us, %for.inc.lr.ph.us.us 74 %5 = phi i32 [ %4, %for.inc.lr.ph.us.us ], [ %inc.us.us, %for.inc.us.us ] 75 %inc.us.us = add nsw i32 %5, 1 76 %cmp9.us.us = icmp slt i32 %inc.us.us, 1 [all …]
|
/external/google-breakpad/src/processor/testdata/ |
D | module0.out | 323 FILE 322 f:\sp\public\sdk\inc\ddbanned.h 329 FILE 328 f:\sp\public\sdk\inc\reason.h 330 FILE 329 f:\sp\public\sdk\inc\wincon.h 331 FILE 330 f:\sp\public\sdk\inc\pshpack2.h 332 FILE 331 f:\sp\public\sdk\inc\mcx.h 333 FILE 332 f:\sp\public\sdk\inc\winuser.h 334 FILE 333 f:\sp\public\sdk\inc\winnls.h 335 FILE 334 f:\sp\public\sdk\inc\guiddef.h 336 FILE 335 f:\sp\public\sdk\inc\specstrings.h 337 FILE 336 f:\sp\public\sdk\inc\basetsd.h [all …]
|
/external/google-breakpad/src/processor/testdata/symbols/test_app.pdb/5A9832E5287241C1838ED98914E9B7FF1/ |
D | test_app.sym | 323 FILE 322 f:\sp\public\sdk\inc\ddbanned.h 329 FILE 328 f:\sp\public\sdk\inc\reason.h 330 FILE 329 f:\sp\public\sdk\inc\wincon.h 331 FILE 330 f:\sp\public\sdk\inc\pshpack2.h 332 FILE 331 f:\sp\public\sdk\inc\mcx.h 333 FILE 332 f:\sp\public\sdk\inc\winuser.h 334 FILE 333 f:\sp\public\sdk\inc\winnls.h 335 FILE 334 f:\sp\public\sdk\inc\guiddef.h 336 FILE 335 f:\sp\public\sdk\inc\specstrings.h 337 FILE 336 f:\sp\public\sdk\inc\basetsd.h [all …]
|
/external/llvm/test/Transforms/LoopUnswitch/ |
D | 2015-06-17-Metadata.ll | 12 for.body: ; preds = %for.inc, %for.body.lr.ph 13 %inc.i = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] 14 %mul.i = phi i32 [ 3, %for.body.lr.ph ], [ %mul.p, %for.inc ] 15 %add.i = phi i32 [ %a, %for.body.lr.ph ], [ %add.p, %for.inc ] 23 ; CHECK: %exitcond.us = icmp eq i32 %inc.us, %b 26 br label %for.inc 30 br label %for.inc 33 ; CHECK: %inc = add nuw nsw i32 %inc.i, 1 34 ; CHECK: %exitcond = icmp eq i32 %inc, %b 36 for.inc: ; preds = %if.then, %if.else [all …]
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | Makefile | 15 BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \ 16 X86GenAsmWriter.inc X86GenAsmMatcher.inc \ 17 X86GenAsmWriter1.inc X86GenDAGISel.inc \ 18 X86GenDisassemblerTables.inc X86GenFastISel.inc \ 19 X86GenCallingConv.inc X86GenSubtargetInfo.inc \ 20 X86GenEDInfo.inc
|
/external/llvm/lib/Target/Mips/ |
D | Android.bp | 31 "MipsGenRegisterInfo.inc", 32 "MipsGenInstrInfo.inc", 33 "MipsGenCodeEmitter.inc", 34 "MipsGenMCCodeEmitter.inc", 35 "MipsGenMCPseudoLowering.inc", 36 "MipsGenAsmWriter.inc", 37 "MipsGenAsmMatcher.inc", 38 "MipsGenDAGISel.inc", 39 "MipsGenFastISel.inc", 40 "MipsGenCallingConv.inc", [all …]
|
/external/llvm/lib/Target/AArch64/ |
D | Android.bp | 38 "AArch64GenRegisterInfo.inc", 39 "AArch64GenInstrInfo.inc", 40 "AArch64GenAsmWriter.inc", 41 "AArch64GenAsmWriter1.inc", 42 "AArch64GenDAGISel.inc", 43 "AArch64GenCallingConv.inc", 44 "AArch64GenAsmMatcher.inc", 45 "AArch64GenSubtargetInfo.inc", 46 "AArch64GenMCCodeEmitter.inc", 47 "AArch64GenFastISel.inc", [all …]
|
/external/llvm/lib/Target/ARM/ |
D | Android.bp | 37 "ARMGenRegisterInfo.inc", 38 "ARMGenInstrInfo.inc", 39 "ARMGenCodeEmitter.inc", 40 "ARMGenMCCodeEmitter.inc", 41 "ARMGenMCPseudoLowering.inc", 42 "ARMGenAsmWriter.inc", 43 "ARMGenAsmMatcher.inc", 44 "ARMGenDAGISel.inc", 45 "ARMGenFastISel.inc", 46 "ARMGenCallingConv.inc", [all …]
|