| /external/llvm/unittests/Transforms/Utils/ |
| D | IntegerDivision.cpp | 47 EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); in TEST()
107 EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); in TEST()
168 EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); in TEST()
228 EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); in TEST()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineShifts.cpp | 339 if (I.getOpcode() != Instruction::AShr && in FoldShiftByConstant()
525 if (isValid && I.getOpcode() == Instruction::AShr) in FoldShiftByConstant()
576 if (I.getOpcode() != Instruction::AShr) in FoldShiftByConstant()
603 ShiftOp->getOpcode() == Instruction::AShr); in FoldShiftByConstant()
632 if (I.getOpcode() == Instruction::AShr && in FoldShiftByConstant()
637 BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr, in FoldShiftByConstant()
680 if (I.getOpcode() == Instruction::AShr && in FoldShiftByConstant()
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| D | InstCombineSelect.cpp | 92 case Instruction::AShr: in GetSelectFoldableOperands()
110 case Instruction::AShr: in GetSelectFoldableConstant()
529 Value *AShr = Builder->CreateAShr(CmpLHS, Ty->getBitWidth()-1); in visitSelectInstWithICmp() local
533 return replaceInstUsesWith(SI, Builder->CreateOr(AShr, C1)); in visitSelectInstWithICmp()
535 Value *And = Builder->CreateAnd(AShr, C2->getValue()-C1->getValue()); in visitSelectInstWithICmp()
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| D | InstCombineVectorOps.cpp | 664 case Instruction::AShr: in CanEvaluateShuffled()
727 case Instruction::AShr: in buildNew()
827 case Instruction::AShr: in EvaluateInDifferentElementOrder()
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| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Instruction.h | 102 return Opcode >= Shl && Opcode <= AShr; in isShift()
113 return getOpcode() == AShr; in isArithmeticShift()
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| D | Operator.h | 150 OpC == Instruction::AShr || in isPossiblyExactOpcode()
215 : public ConcreteOperator<PossiblyExactOperator, Instruction::AShr> {
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| D | Instruction.def | 125 HANDLE_BINARY_INST(23, AShr , BinaryOperator) // Shift right (arithmetic)
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyTargetTransformInfo.cpp | 57 case Instruction::AShr: in getArithmeticInstrCost()
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineShifts.cpp | 318 if (I.getOpcode() != Instruction::AShr && in FoldShiftByConstant()
336 if (I.getOpcode() != Instruction::AShr) in FoldShiftByConstant()
508 if (isValid && I.getOpcode() == Instruction::AShr) in FoldShiftByConstant()
547 if (I.getOpcode() != Instruction::AShr) in FoldShiftByConstant()
578 ShiftOp->getOpcode() == Instruction::AShr); in FoldShiftByConstant()
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| D | InstCombineSelect.cpp | 95 case Instruction::AShr: in GetSelectFoldableOperands()
113 case Instruction::AShr: in GetSelectFoldableConstant()
465 Value *AShr = Builder->CreateAShr(CmpLHS, Ty->getBitWidth()-1); in visitSelectInstWithICmp() local
469 return ReplaceInstUsesWith(SI, Builder->CreateOr(AShr, C1)); in visitSelectInstWithICmp()
471 Value *And = Builder->CreateAnd(AShr, C2->getValue()-C1->getValue()); in visitSelectInstWithICmp()
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| /external/llvm/include/llvm/IR/ |
| D | Instruction.h | 123 return Opcode >= Shl && Opcode <= AShr;
133 return getOpcode() == AShr;
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| D | Operator.h | 148 OpC == Instruction::AShr || in isPossiblyExactOpcode()
354 : public ConcreteOperator<PossiblyExactOperator, Instruction::AShr> {
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| D | PatternMatch.h | 536 inline BinaryOp_match<LHS, RHS, Instruction::AShr> m_AShr(const LHS &L, in m_AShr()
538 return BinaryOp_match<LHS, RHS, Instruction::AShr>(L, R); in m_AShr()
657 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>
659 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>(L, R); in m_Shr()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonOptimizeSZextends.cpp | 112 if (!(Ashr && Ashr->getOpcode() == Instruction::AShr)) in runOnFunction()
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| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| D | PatternMatch.h | 393 inline BinaryOp_match<LHS, RHS, Instruction::AShr>
395 return BinaryOp_match<LHS, RHS, Instruction::AShr>(L, R); in m_AShr()
424 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>
426 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>(L, R); in m_Shr()
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| /external/llvm/include/llvm/MC/ |
| D | MCExpr.h | 405 AShr, ///< Arithmetic shift right. enumerator
486 return create(AShr, LHS, RHS, Ctx); in createAShr()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | SpeculativeExecution.cpp | 219 case Instruction::AShr: in ComputeSpeculationCost()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 158 case Instruction::AShr: in getIntImmCost()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 100 case Instruction::AShr: in createReplacementInstr()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 102 case Instruction::AShr: in getIntImmCost()
399 Cost += getArithmeticInstrCost(Instruction::AShr, Ty, Opd1Info, Opd2Info, in getArithmeticInstrCost()
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| /external/llvm/lib/MC/ |
| D | MCExpr.cpp | 97 case MCBinaryExpr::AShr: OS << ">>"; break; in print()
720 case MCBinaryExpr::AShr: Result = LHS >> RHS; break; in evaluateAsRelocatableImpl()
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| /external/swiftshader/third_party/LLVM/lib/Target/CBackend/ |
| D | CBackend.cpp | 818 case Instruction::AShr: in printConstant()
841 case Instruction::AShr: Out << " >> "; break; in printConstant()
1139 case Instruction::AShr: in printConstExprCast()
1204 case Instruction::AShr: in printConstantWithCast()
1349 case Instruction::AShr: in writeInstructionCast()
1394 case Instruction::AShr: in writeOperandWithCast()
2573 case Instruction::AShr: Out << " >> "; break; in visitBinaryOperator()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 144 case Instruction::AShr: in getIntImmCost()
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| /external/llvm/lib/Analysis/ |
| D | DemandedBits.cpp | 172 case Instruction::AShr: in determineLiveOperandBits()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 1134 case Instruction::AShr: OpReg = X86::SAR8rCL; break; in X86SelectShift()
1143 case Instruction::AShr: OpReg = X86::SAR16rCL; break; in X86SelectShift()
1152 case Instruction::AShr: OpReg = X86::SAR32rCL; break; in X86SelectShift()
1161 case Instruction::AShr: OpReg = X86::SAR64rCL; break; in X86SelectShift()
1940 case Instruction::AShr: in TargetSelectInstruction()
|