| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 626 ATOMIC_LOAD_NAND, enumerator
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| D | SelectionDAGNodes.h | 974 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1059 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 733 ATOMIC_LOAD_NAND, enumerator
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| D | SelectionDAGNodes.h | 1108 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1189 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 72 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 147 case ISD::ATOMIC_LOAD_NAND: in PromoteIntegerResult()
1342 case ISD::ATOMIC_LOAD_NAND: in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 471 case ISD::ATOMIC_LOAD_NAND: in AddNodeIDCustom()
4913 Opcode == ISD::ATOMIC_LOAD_NAND || in getAtomic()
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| D | LegalizeDAG.cpp | 3772 case ISD::ATOMIC_LOAD_NAND: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 3938 case AtomicRMWInst::Nand: NT = ISD::ATOMIC_LOAD_NAND; break; in visitAtomicRMW()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 139 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 129 case ISD::ATOMIC_LOAD_NAND: in PromoteIntegerResult()
1123 case ISD::ATOMIC_LOAD_NAND: in ExpandIntegerResult()
1238 case ISD::ATOMIC_LOAD_NAND: in ExpandAtomic()
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| D | SelectionDAG.cpp | 431 case ISD::ATOMIC_LOAD_NAND: in AddNodeIDCustom()
3935 Opcode == ISD::ATOMIC_LOAD_NAND || in getAtomic()
5883 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; in getOperationName()
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| D | LegalizeDAG.cpp | 2948 case ISD::ATOMIC_LOAD_NAND: in ExpandAtomic()
3051 case ISD::ATOMIC_LOAD_NAND: in ExpandNode()
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| D | DAGCombiner.cpp | 7134 case ISD::ATOMIC_LOAD_NAND: in visitMEMBARRIER()
7160 case ISD::ATOMIC_LOAD_NAND: in visitMEMBARRIER()
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| D | SelectionDAGBuilder.cpp | 3366 case AtomicRMWInst::Nand: NT = ISD::ATOMIC_LOAD_NAND; break; in visitAtomicRMW()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 249 setTargetDAGCombine(ISD::ATOMIC_LOAD_NAND); in SITargetLowering()
3015 case ISD::ATOMIC_LOAD_NAND: in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 747 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_NAND, SYNC_FETCH_AND_NAND) in getSYNC()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 430 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 510 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 210 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Custom); in SystemZTargetLowering()
4545 case ISD::ATOMIC_LOAD_NAND: in LowerOperation()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 645 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in ARMTargetLowering()
5015 case ISD::ATOMIC_LOAD_NAND: in ReplaceNodeResults()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 490 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i64, Custom); in X86TargetLowering()
10598 case ISD::ATOMIC_LOAD_NAND: in ReplaceNodeResults()
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| D | X86GenDAGISel.inc | 33195 /*SwitchOpcode*/ 94, TARGET_VAL(ISD::ATOMIC_LOAD_NAND),// ->69035
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 877 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in ARMTargetLowering()
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