Searched refs:ATOMIC_LOAD_UMIN (Results 1 – 23 of 23) sorted by relevance
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 629 ATOMIC_LOAD_UMIN, enumerator
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| D | SelectionDAGNodes.h | 977 N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
1062 N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 736 ATOMIC_LOAD_UMIN, enumerator
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| D | SelectionDAGNodes.h | 1111 N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
1192 N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 75 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 150 case ISD::ATOMIC_LOAD_UMIN: in PromoteIntegerResult()
1345 case ISD::ATOMIC_LOAD_UMIN: in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 474 case ISD::ATOMIC_LOAD_UMIN: in AddNodeIDCustom()
4916 Opcode == ISD::ATOMIC_LOAD_UMIN || in getAtomic()
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| D | LegalizeDAG.cpp | 3775 case ISD::ATOMIC_LOAD_UMIN: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 3944 case AtomicRMWInst::UMin: NT = ISD::ATOMIC_LOAD_UMIN; break; in visitAtomicRMW()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 142 setOperationAction(ISD::ATOMIC_LOAD_UMIN, MVT::i32, Expand); in Mips16TargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 252 setTargetDAGCombine(ISD::ATOMIC_LOAD_UMIN); in SITargetLowering()
3018 case ISD::ATOMIC_LOAD_UMIN: in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 751 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_UMIN, SYNC_FETCH_AND_UMIN) in getSYNC()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 132 case ISD::ATOMIC_LOAD_UMIN: in PromoteIntegerResult()
1126 case ISD::ATOMIC_LOAD_UMIN: in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 434 case ISD::ATOMIC_LOAD_UMIN: in AddNodeIDCustom()
3938 Opcode == ISD::ATOMIC_LOAD_UMIN || in getAtomic()
5886 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; in getOperationName()
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| D | DAGCombiner.cpp | 7137 case ISD::ATOMIC_LOAD_UMIN: in visitMEMBARRIER()
7163 case ISD::ATOMIC_LOAD_UMIN: in visitMEMBARRIER()
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| D | LegalizeDAG.cpp | 3054 case ISD::ATOMIC_LOAD_UMIN: in ExpandNode()
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| D | SelectionDAGBuilder.cpp | 3372 case AtomicRMWInst::UMin: NT = ISD::ATOMIC_LOAD_UMIN; break; in visitAtomicRMW()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 436 def atomic_load_umin : SDNode<"ISD::ATOMIC_LOAD_UMIN", SDTAtomic2,
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 516 def atomic_load_umin : SDNode<"ISD::ATOMIC_LOAD_UMIN", SDTAtomic2,
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 213 setOperationAction(ISD::ATOMIC_LOAD_UMIN, MVT::i32, Custom); in SystemZTargetLowering()
4551 case ISD::ATOMIC_LOAD_UMIN: in LowerOperation()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 648 setOperationAction(ISD::ATOMIC_LOAD_UMIN, MVT::i32, Expand); in ARMTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 880 setOperationAction(ISD::ATOMIC_LOAD_UMIN, MVT::i32, Expand); in ARMTargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenDAGISel.inc | 33293 /*SwitchOpcode*/ 72, TARGET_VAL(ISD::ATOMIC_LOAD_UMIN),// ->69260
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