/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 620 ATOMIC_SWAP, enumerator
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D | SelectionDAGNodes.h | 968 N->getOpcode() == ISD::ATOMIC_SWAP || 1053 N->getOpcode() == ISD::ATOMIC_SWAP ||
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 727 ATOMIC_SWAP, enumerator
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D | SelectionDAGNodes.h | 1102 N->getOpcode() == ISD::ATOMIC_SWAP || 1183 N->getOpcode() == ISD::ATOMIC_SWAP ||
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 66 case ISD::ATOMIC_SWAP: return "AtomicSwap"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 152 case ISD::ATOMIC_SWAP: in PromoteIntegerResult() 1347 case ISD::ATOMIC_SWAP: in ExpandIntegerResult() 3208 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_ATOMIC_STORE()
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D | LegalizeDAG.cpp | 2808 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandNode() 3766 case ISD::ATOMIC_SWAP: in ConvertNodeToLibcall()
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D | SelectionDAG.cpp | 465 case ISD::ATOMIC_SWAP: in AddNodeIDCustom() 4918 Opcode == ISD::ATOMIC_SWAP || in getAtomic()
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 133 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
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D | MipsInstrInfo.td | 1553 // Atomic instructions with 2 source operands (ATOMIC_SWAP & ATOMIC_LOAD_*).
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 134 case ISD::ATOMIC_SWAP: in PromoteIntegerResult() 1128 case ISD::ATOMIC_SWAP: { in ExpandIntegerResult() 1175 case ISD::ATOMIC_SWAP: in ExpandAtomic() 2828 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_ATOMIC_STORE()
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D | LegalizeDAG.cpp | 2885 case ISD::ATOMIC_SWAP: in ExpandAtomic() 3032 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandNode() 3045 case ISD::ATOMIC_SWAP: in ExpandNode()
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D | SelectionDAG.cpp | 425 case ISD::ATOMIC_SWAP: in AddNodeIDCustom() 3940 Opcode == ISD::ATOMIC_SWAP || in getAtomic() 5877 case ISD::ATOMIC_SWAP: return "AtomicSwap"; in getOperationName()
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D | DAGCombiner.cpp | 7128 case ISD::ATOMIC_SWAP: in visitMEMBARRIER() 7154 case ISD::ATOMIC_SWAP: in visitMEMBARRIER()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 243 setTargetDAGCombine(ISD::ATOMIC_SWAP); in SITargetLowering() 3009 case ISD::ATOMIC_SWAP: in PerformDAGCombine()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 740 OP_TO_LIBCALL(ISD::ATOMIC_SWAP, SYNC_LOCK_TEST_AND_SET) in getSYNC()
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/external/llvm/docs/ |
D | Atomics.rst | 579 ISelLowering code has set the corresponding ``ATOMIC_CMPXCHG``, ``ATOMIC_SWAP``,
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsInstrInfo.td | 563 // Atomic instructions with 2 source operands (ATOMIC_SWAP & ATOMIC_LOAD_*).
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSelectionDAG.td | 420 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1645 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal); in SparcTargetLowering() 1655 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal); in SparcTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 500 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 630 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Custom); in ARMTargetLowering() 639 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in ARMTargetLowering() 5027 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.td | 1812 multiclass ATOMIC_SWAP<bits<8> opc8, bits<8> opc, string mnemonic, string frag, 1846 defm XCHG : ATOMIC_SWAP<0x86, 0x87, "xchg", "atomic_swap", IIC_XCHG_MEM>;
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 204 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Custom); in SystemZTargetLowering() 4529 case ISD::ATOMIC_SWAP: in LowerOperation()
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D | SystemZInstrFormats.td | 2501 // OPERATOR is ATOMIC_SWAP or an ATOMIC_LOAD_* operation. PAT and OPERAND
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