| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | AddrModeMatcher.cpp | 80 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in MatchScaledValue()
83 ExtAddrMode TestAddrMode = AddrMode; in MatchScaledValue()
95 AddrMode = TestAddrMode; in MatchScaledValue()
110 AddrMode = TestAddrMode; in MatchScaledValue()
181 ExtAddrMode BackupAddrMode = AddrMode; in MatchOperationAddr()
188 AddrMode = BackupAddrMode; in MatchOperationAddr()
197 AddrMode = BackupAddrMode; in MatchOperationAddr()
249 AddrMode.BaseOffs += ConstantOffset; in MatchOperationAddr()
250 if (ConstantOffset == 0 || TLI.isLegalAddressingMode(AddrMode, AccessTy)){ in MatchOperationAddr()
255 AddrMode.BaseOffs -= ConstantOffset; in MatchOperationAddr()
[all …]
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| /external/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 2083 struct ExtAddrMode : public TargetLowering::AddrMode {
2597 ExtAddrMode &AddrMode; member in __anonebd7bfba0211::AddressingModeMatcher
2620 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts), in AddressingModeMatcher()
2677 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in matchScaledValue()
2680 ExtAddrMode TestAddrMode = AddrMode; in matchScaledValue()
2692 AddrMode = TestAddrMode; in matchScaledValue()
2707 AddrMode = TestAddrMode; in matchScaledValue()
3187 ExtAddrMode BackupAddrMode = AddrMode; in matchOperationAddr()
3201 AddrMode = BackupAddrMode; in matchOperationAddr()
3211 AddrMode = BackupAddrMode; in matchOperationAddr()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| D | CodeGenPrepare.cpp | 732 ExtAddrMode AddrMode; in OptimizeMemoryInst() local
762 AddrMode = NewAddrMode; in OptimizeMemoryInst()
765 } else if (NewAddrMode == AddrMode) { in OptimizeMemoryInst()
805 DEBUG(dbgs() << "CGP: Found local addrmode: " << AddrMode << "\n"); in OptimizeMemoryInst()
820 DEBUG(dbgs() << "CGP: Reusing nonlocal addrmode: " << AddrMode << " for " in OptimizeMemoryInst()
825 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for " in OptimizeMemoryInst()
837 if (AddrMode.BaseReg) { in OptimizeMemoryInst()
838 Value *V = AddrMode.BaseReg; in OptimizeMemoryInst()
847 if (AddrMode.Scale) { in OptimizeMemoryInst()
848 Value *V = AddrMode.ScaledReg; in OptimizeMemoryInst()
[all …]
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| /external/vixl/src/aarch32/ |
| D | operands-aarch32.h | 651 explicit MemOperand(Register rn, AddrMode addrmode = Offset)
668 MemOperand(Register rn, int32_t offset, AddrMode addrmode = Offset)
678 MemOperand(Register rn, Sign sign, int32_t offset, AddrMode addrmode = Offset)
695 MemOperand(Register rn, Sign sign, Register rm, AddrMode addrmode = Offset)
709 MemOperand(Register rn, Register rm, AddrMode addrmode = Offset)
729 AddrMode addrmode = Offset)
745 MemOperand(Register rn, Register rm, Shift shift, AddrMode addrmode = Offset)
768 AddrMode addrmode = Offset)
789 AddrMode addrmode = Offset)
813 AddrMode GetAddrMode() const { in GetAddrMode()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 458 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
463 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex()
533 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
539 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
549 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
554 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
568 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
582 } else if (AddrMode == ARMII::AddrModeT2_i8s4) { in rewriteT2FrameIndex()
605 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
619 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
|
| D | ARMInstrFormats.td | 90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
[all …]
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| D | ARMBaseRegisterInfo.cpp | 452 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
456 switch (AddrMode) { in getFrameIndexInstrOffset()
641 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
650 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
656 switch (AddrMode) { in isFrameOffsetLegal()
|
| D | ARMInstrNEON.td | 666 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode>
668 (ins AddrMode:$Rn), IIC_VLD1,
674 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode>
676 (ins AddrMode:$Rn), IIC_VLD1x2,
694 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
696 (ins AddrMode:$Rn), IIC_VLD1u,
704 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u,
711 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
713 (ins AddrMode:$Rn), IIC_VLD1x2u,
721 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 390 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
395 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex()
465 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
471 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
481 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
486 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
500 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
531 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
545 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
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| D | ARMInstrFormats.td | 90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
[all …]
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| D | ARMBaseRegisterInfo.cpp | 894 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
898 switch (AddrMode) { in getFrameIndexInstrOffset()
1085 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
1094 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
1100 switch (AddrMode) { in isFrameOffsetLegal()
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| D | ARMISelLowering.h | 274 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
275 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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| /external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/ |
| D | AddrModeMatcher.h | 36 struct ExtAddrMode : public TargetLowering::AddrMode {
66 ExtAddrMode &AddrMode; variable
76 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) { in AddressingModeMatcher()
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| /external/spirv-llvm/lib/SPIRV/libSPIRV/ |
| D | SPIRVValue.h | 308 :SPIRVValue(M, WC, OC, TheType, TheId), AddrMode(TheAddrMode), in SPIRVConstantSampler()
313 SPIRVConstantSampler():SPIRVValue(OC), AddrMode(SPIRVSAM_Invalid), in SPIRVConstantSampler()
317 return AddrMode; in getAddrMode()
331 SPIRVWord AddrMode;
340 _SPIRV_DEF_ENCDEC5(Type, Id, AddrMode, Normalized, FilterMode)
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.h | 69 bool isLegalFlatAddressingMode(const AddrMode &AM) const;
70 bool isLegalMUBUFAddressingMode(const AddrMode &AM) const;
86 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 235 enum AddrMode { enum
255 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 218 enum AddrMode { enum
238 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.h | 821 AddrMode addrmode = Offset);
830 MemOperand(Register base, const Operand& offset, AddrMode addrmode = Offset);
845 AddrMode GetAddrMode() const { return addrmode_; } in GetAddrMode()
846 VIXL_DEPRECATED("GetAddrMode", AddrMode addrmode() const) {
887 AddrMode addrmode_;
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| D | operands-aarch64.cc | 376 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode) in MemOperand()
425 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode) in MemOperand()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 83 enum AddrMode { enum
|
| /external/v8/src/arm64/ |
| D | simulator-arm64.h | 666 AddrMode addrmode);
667 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
669 AddrMode addrmode);
672 AddrMode addrmode);
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.h | 57 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.h | 181 virtual bool isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 82 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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| /external/v8/src/arm/ |
| D | assembler-arm.h | 551 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
556 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
562 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
565 AddrMode am = Offset)) {
582 AddrMode am() const { return am_; } in am()
594 AddrMode am_; // bits P, U, and W
606 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
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