Searched refs:And0 (Results 1 – 5 of 5) sorted by relevance
| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | intrinsic_common.inl | 167 __m128 And0 = _mm_and_ps(Cmp0, Neg); local
170 return _mm_or_ps(And0, And1);
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 592 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); in PerformORCombine() local
597 if (And0.getOpcode() != ISD::AND) in PerformORCombine()
600 if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) || in PerformORCombine()
634 And0.getOperand(0)); in PerformORCombine()
1620 SDValue And0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op0, in LowerFCOPYSIGN32() local
1624 SDValue Result = DAG.getNode(ISD::OR, dl, MVT::i32, And0, And1); in LowerFCOPYSIGN32()
1645 SDValue And0 = DAG.getNode(ISD::AND, dl, MVT::i32, Hi0, in LowerFCOPYSIGN64() local
1649 SDValue Word1 = DAG.getNode(ISD::OR, dl, MVT::i32, And0, And1); in LowerFCOPYSIGN64()
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| /external/vulkan-validation-layers/libs/glm/gtx/ |
| D | simd_vec4.inl | 325 __m128 And0 = _mm_and_ps(Sub0, Cmp0); local
328 return _mm_or_ps(And0, And1);
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2252 SDValue And0 = N->getOperand(0); in tryBitfieldInsertOpFromOr() local
2254 if (And0.hasOneUse() && And1.hasOneUse() && in tryBitfieldInsertOpFromOr()
2255 isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) && in tryBitfieldInsertOpFromOr()
2264 std::swap(And0, And1); in tryBitfieldInsertOpFromOr()
2269 SDValue Dst = And0->getOperand(0); in tryBitfieldInsertOpFromOr()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 734 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); in performORCombine() local
739 if (And0.getOpcode() != ISD::AND) in performORCombine()
742 if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) || in performORCombine()
777 And0.getOperand(0)); in performORCombine()
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