| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3136 unsigned ArgReg = ArgRegs[VA.getValNo()]; in fastLowerCall() local
3148 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3149 ArgVT, ArgReg); in fastLowerCall()
3161 ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg, /*TODO: Kill=*/false); in fastLowerCall()
3164 if (ArgReg == 0) in fastLowerCall()
3168 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3169 ArgVT, ArgReg); in fastLowerCall()
3177 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3178 ArgVT, ArgReg); in fastLowerCall()
3180 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1143 unsigned ArgReg = getRegForValue(ArgVal); in processCallArgs() local
1144 if (!ArgReg) in processCallArgs()
1155 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1156 if (!ArgReg) in processCallArgs()
1163 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1164 if (!ArgReg) in processCallArgs()
1175 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
|
| D | MipsISelLowering.cpp | 3081 unsigned ArgReg = VA.getLocReg(); in LowerFormalArguments() local
3086 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC); in LowerFormalArguments()
3100 getNextIntArgReg(ArgReg), RC); in LowerFormalArguments()
3756 unsigned ArgReg = ByValArgRegs[FirstReg + I]; in copyByValRegs() local
3757 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs()
3797 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
3798 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
3847 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
3848 RegsToPass.push_back(std::make_pair(ArgReg, Val)); in passByValArg()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 1610 unsigned ArgReg; in DoSelectCall() local
1618 ArgReg = getRegForValue(ArgVal); in DoSelectCall()
1619 if (ArgReg == 0) return false; in DoSelectCall()
1624 ArgReg = FastEmit_ri(ArgVT, ArgVT, ISD::AND, ArgReg, in DoSelectCall()
1627 ArgReg = getRegForValue(ArgVal); in DoSelectCall()
1630 if (ArgReg == 0) return false; in DoSelectCall()
1641 Args.push_back(ArgReg); in DoSelectCall()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 494 unsigned ArgReg; in LowerReturn() local
496 ArgReg = Alpha::R0; in LowerReturn()
499 ArgReg = Alpha::F0; in LowerReturn()
501 Copy = DAG.getCopyToReg(Copy, dl, ArgReg, in LowerReturn()
504 DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg); in LowerReturn()
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| D | BugReporterVisitors.cpp | 1665 const MemRegion *ArgReg = Call->getArgSVal(Idx).getAsRegion(); in VisitNode() local
1668 if ( !ArgReg || (ArgReg != R && !R->isSubRegionOf(ArgReg->StripCasts()))) in VisitNode()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1375 unsigned ArgReg; in processCallArgs() local
1377 ArgReg = NextFPR++; in processCallArgs()
1381 ArgReg = NextGPR++; in processCallArgs()
1384 TII.get(TargetOpcode::COPY), ArgReg).addReg(Arg); in processCallArgs()
1385 RegArgs.push_back(ArgReg); in processCallArgs()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 2948 unsigned ArgReg = getRegForValue(ArgVal); in processCallArgs() local
2949 if (!ArgReg) in processCallArgs()
2959 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
2960 if (!ArgReg) in processCallArgs()
2969 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
2970 if (!ArgReg) in processCallArgs()
2981 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
3010 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 708 for (unsigned ArgReg : Args) in selectCall() local
709 MIB.addReg(ArgReg); in selectCall()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2278 unsigned ArgReg = VA.getLocReg(); in LowerFormalArguments() local
2294 unsigned Reg = AddLiveIn(DAG.getMachineFunction(), ArgReg, RC); in LowerFormalArguments()
2318 getNextIntArgReg(ArgReg), RC); in LowerFormalArguments()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 90 unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg(); in parametersInCSRMatch() local
91 if (MRI.getLiveInPhysReg(ArgReg) != Reg) in parametersInCSRMatch()
|